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BCU/library/bsp/bsp_bf8915a.h

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2024-11-26 15:52:49 +08:00
/**
******************************************************************************
* @file BF8915A.h
* @version V1.1.4
* @date 2021-12-20
* @brief This file provides the BF8915A functions(<EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><EFBFBD>ṩBF8915A<EFBFBD><EFBFBD><EFBFBD><EFBFBD>).
*/
#ifndef __BF8915A_H__
#define __BF8915A_H__
//#include "kit_sys.h"
#include <stdlib.h>
#include "stdint.h"
#include <stdio.h>
#include "gpio_manager.h"
typedef enum
{
FALSE = 0U,
TRUE = 1U,
}BOOLEAN_Type;
typedef unsigned char BOOLEAN;
//typedef BOOLEAN_Type BOOLEAN;//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>͵<EFBFBD>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>stdbool<6F>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>boolֵ<6C><D6B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͻ<EFBFBD><CDBB><EFBFBD><EFBFBD><EFBFBD>ֲ
extern BOOLEAN isospi_reverse;//<2F>ı<EFBFBD><C4B1>ñ<EFBFBD><C3B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʵ<EFBFBD>־ջ<D6BE><D5BB><EFBFBD>SPI<50><49><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD>š<EFBFBD>
//FALSE:<3A><><EFBFBD>Ե<EFBFBD><D4B5><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD>ţ<EFBFBD><C5A3><EFBFBD>SDK<44>е<EFBFBD>SPI1Ϊ<31><CEAA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD>ţ<EFBFBD>SPI1<49>ջ<EFBFBD><D5BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӵĵ<D3B5>һ<EFBFBD><D2BB>IC<49><43><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IC0;
//TURE: <20><><EFBFBD>Եķ<D4B5><C4B7><EFBFBD>ͨ<EFBFBD>ţ<EFBFBD><C5A3><EFBFBD>SDK<44>е<EFBFBD>SPI2Ϊ<32><CEAA><EFBFBD>Է<EFBFBD><D4B7><EFBFBD>ͨ<EFBFBD>ţ<EFBFBD><C5A3><EFBFBD>Ҳ<EFBFBD><D2B2>SPI1<49>ջ<EFBFBD><D5BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӵĵ<D3B5>һ<EFBFBD><D2BB>IC<49><43><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IC0<43><30>
extern const uint16_t crc15Table[256];//precomputed CRC15 Table(Ԥ<><D4A4><EFBFBD><EFBFBD>15λѭ<CEBB><D1AD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><D0A3>ֵ<EFBFBD>ı<EFBFBD>)
#define TOTAL_IC 100U //<2F>ջ<EFBFBD><D5BB><EFBFBD><EFBFBD>ϴ<EFBFBD><CFB4><EFBFBD>IC(8915A)<29>ĸ<EFBFBD><C4B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʵ<EFBFBD><CAB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>޸Ĵ<DEB8><C4B4><EFBFBD>
#define CELL_CHANNELS 16U //16<31><36><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD><CDA8>
#define GPIO_CHANNELS 9U //8<><38>GPIO + 1<><31>VD33T
#define STAT_CHANNELS 8U //8<><38>16λ<36>ĵ<EFBFBD>ѹ<EFBFBD><D1B9><EFBFBD><EFBFBD>
#define NUM_CV_REG 6U //Cell Voltage Register Group(<28><><EFBFBD>ص<EFBFBD>ѹ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>) A B C D E F<><46>6<EFBFBD><36>
#define NUM_GOIO_REG 3U //Auxiliary Register Group(<28><><EFBFBD><EFBFBD>GPIOx<4F><78>ѹ<EFBFBD><D1B9>Ϣ)A B C <20><>3<EFBFBD><33>
#define NUM_STAT_REG 4U //Status Register Group(״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>) A B C D<><44>4<EFBFBD><34>
//ADCת<43><D7AA><EFBFBD>ĵ<EFBFBD><C4B5><EFBFBD>ѡ<EFBFBD><D1A1>
#define CSEL_CH_ALL 0U
#define CSEL_CH_1and9 1U
#define CSEL_CH_2and10 2U
#define CSEL_CH_3and11 3U
#define CSEL_CH_4and12 4U
#define CSEL_CH_5and13 5U
#define CSEL_CH_6and14 6U
#define CSEL_CH_7and15 7U
#define CSEL_CH_8and16 8U
//ADCת<43><D7AA><EFBFBD><EFBFBD>GPIOѡ<4F><D1A1>
#define GSEL_CH_ALL 0U //<2F><><EFBFBD><EFBFBD>GPIO0~GPIO7,VD33T
#define GSEL_CH_GPIO0 1U
#define GSEL_CH_GPIO1 2U
#define GSEL_CH_GPIO2 3U
#define GSEL_CH_GPIO3 4U
#define GSEL_CH_VD33T 5U
#define GSEL_CH_GPIO4 6U
#define GSEL_CH_GPIO5 7U
#define GSEL_CH_GPIO6 8U
#define GSEL_CH_GPIO7 9U
//ADCת<43><D7AA><EFBFBD>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD>ѡ<EFBFBD><D1A1> STSEL
#define STSEL_CH_ALL 0U //<2F><><EFBFBD><EFBFBD><EFBFBD>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD>VD33<33><33>VH<56><48>VD7<44><37>VD5<44><35>VD4<44><34>VTEMP<4D><50>VREF2<46><32>VREF_LP
#define STSEL_CH_VD33 1U
#define STSEL_CH_VH 2U
#define STSEL_CH_VD7 3U
#define STSEL_CH_VD5 4U
#define STSEL_CH_VD4 5U
#define STSEL_CH_VTEMP 6U
#define STSEL_CH_VREF2 7U
#define STSEL_CH_VREF_LP 8U
//ADCƵ<43><C6B5>ѡ<EFBFBD><D1A1>
#define CLKSEL_2M 1U
#define CLKSEL_4M 0U //ADCW<43><57><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ4096(ADCOWָ<57><D6B8>ʱʹ<CAB1><CAB9>,<2C><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>)
//CFGAR2
#define OSR_SEL FALSE //0U ADC<44><43><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ64<36><34>128<32><38>256<35><36>512(<28><><EFBFBD>ֹ<EFBFBD><D6B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD><CDA8>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD>OSRѡ<52><D1A1>)
#define OSR_SEL_DISABLE TRUE //1U ADCW<43><57><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ4096(ADCOWָ<57><D6B8>ʱʹ<CAB1>ã<EFBFBD><C3A3><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>)
//ADC<44><43><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѡ<EFBFBD><D1A1>
#define OSR_64 0U
#define OSR_128 1U
#define OSR_256 2U
#define OSR_512_4096 3U
//<2F>ŵ<EFBFBD><C5B5><EFBFBD><EFBFBD><EFBFBD>
#define DISCP_DISABLE 0U //DISCP=0<><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ӧ<EFBFBD>ĵ<EFBFBD><C4B5>غ<EFBFBD><D8BA><EFBFBD><EFBFBD>ڵĵ<DAB5><C4B5>ر<EFBFBD><D8B1><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>S<EFBFBD>ŵķŵ<C4B7>״̬<D7B4><CCAC><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>
#define DISCP_ENABLE 1U //DISCP=1<><31><EFBFBD>ڵ<EFBFBD><DAB5>ز<EFBFBD><D8B2><EFBFBD><EFBFBD>ڼ<EFBFBD>S<EFBFBD>ŵķŵ<C4B7>״̬<D7B4><CCAC><EFBFBD>ı<EFBFBD>
//<2F>Բ<EFBFBD><D4B2><EFBFBD>ģʽѡ<CABD><D1A1>
#define SELFTEST_6666 0U //ST = 0,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>0x6666
#define SELFTEST_9999 1U //ST = 1,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>0x9999
//<2F><><EFBFBD><EFBFBD>ģʽѡ<CABD><D1A1>
#define MNMOD_DISABLE 0U //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ<C4A3><CABD>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD>Ч
#define MNMOD_1 1U //<2F><><EFBFBD><EFBFBD>ģʽ1,ģ<><C4A3><EFBFBD><EFBFBD>Դ<EFBFBD><D4B4>ʱ<EFBFBD>Ӵ򿪣<D3B4>pll_100m<30><6D><EFBFBD><EFBFBD>
#define MNMOD_2 2U //<2F><><EFBFBD><EFBFBD>ģʽ2,ģ<><C4A3><EFBFBD><EFBFBD>Դ<EFBFBD><D4B4>ʱ<EFBFBD>Ӵ򿪣<D3B4>pll_100m<30>ر<EFBFBD>
#define MNMOD_3 3U //<2F><><EFBFBD><EFBFBD>ģʽ3,<2C>͹<EFBFBD><CDB9>ļ<EFBFBD><C4BC>⣬ģ<E2A3AC><C4A3><EFBFBD><EFBFBD>Դ<EFBFBD><D4B4>ʱ<EFBFBD>ӹر<D3B9>
//<2F><><EFBFBD><EFBFBD>ģʽ<C4A3><CABD><EFBFBD><EFBFBD>
#define STRMN_ENABLE 1U //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
#define STRMN_DISABLE 0U //<2F>رռ<D8B1><D5BC><EFBFBD>ģʽ
//GPIO<49><4F><EFBFBD>߼<EFBFBD><DFBC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Դѡ<D4B4><D1A1>
#define DOWN_GPIO_UP 0U //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Դ
#define DOWN_GPIO_DOWN 1U //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Դ
//<2F><><EFBFBD><EFBFBD><EFBFBD>ŵ<EFBFBD><C5B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>żѡ<C5BC><D1A1>
#define OESEL_ODD 0U //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define OESEL_EVEN 1U //ż<><C5BC><EFBFBD><EFBFBD>
//<2F><><EFBFBD>⿪<EFBFBD><E2BFAA><EFBFBD>ܿ<EFBFBD><DCBF><EFBFBD><EFBFBD>ź<EFBFBD>2
#define BLEN_ON 1U //<2F><><EFBFBD><EFBFBD>
#define BLEN_OFF 0U //<2F>ر<EFBFBD>
/***<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>bit[12:9]λ***/
#define CMD_ADCV 0x01U
#define CMD_ADCOW 0x02U
#define CMD_CVST 0x03U
#define CMD_ADOL 0x04U
#define CMD_ADGP 0x05U
#define CMD_ADGOW 0x06U
#define CMD_GPST 0x07U
#define CMD_ADSTAT 0x08U
#define CMD_STATST 0x09U
#define CMD_ADCVGP 0x0aU
#define CMD_ADCVVH 0x0bU
#define CMD_MNT 0x0cU
#define CMD_STRBL 0x0dU
/***<2A><><EFBFBD>üĴ<C3BC><C4B4><EFBFBD>***/
#define RDCFGA 0x05U
#define RDCFGB 0x06U
#define RDCFGC 0x07U
#define RDCFGD 0x08U
/***<2A><><EFBFBD>ص<EFBFBD>ѹ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>Ӧ<EFBFBD><D3A6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>***/
#define CVAR 0x01U // 0x01 + 0x08 = 0x09U <09><><EFBFBD><EFBFBD>BF8915A_rdcv_reg<65><67><EFBFBD>õ<EFBFBD>
#define CVBR 0x02U // 0x02 + 0x08 = 0x0AU
#define CVCR 0x03U // 0x03 + 0x08 = 0x0BU
#define CVDR 0x04U // 0x04 + 0x08 = 0x0CU
#define CVER 0x05U // 0x05 + 0x08 = 0x0DU
#define CVFR 0x06U // 0x06 + 0x08 = 0x0EU
/***GPIOG<4F><47>ѹ***/
#define GVAR 0x01U // 0x01 + 0x0E = 0x0FU <20><><EFBFBD><EFBFBD>BF8915A_rdgv_reg<65><67><EFBFBD>õ<EFBFBD>
#define GVBR 0x02U // 0x02 + 0x0E = 0x10U
#define GVCR 0x03U // 0x03 + 0x0E = 0x11U
/***״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD>RDSTAT***/
#define STATA 0x01U // 0x01 + 0x11 = 0x12U
#define STATB 0x02U // 0x02 + 0x11 = 0x13U
#define STATC 0x03U // 0x03 + 0x11 = 0x14U
#define STATD 0x04U // 0x04 + 0x11 = 0x15U
#define REG_ALL 0x00U
#define NUM_RX_BYT 0x08U //<2F><><EFBFBD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD>ݵ<EFBFBD><DDB5>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>6<EFBFBD><36><EFBFBD><EFBFBD><EFBFBD><EFBFBD>+2<><32>PEC(<28><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>)
typedef struct//Register data structure(<28>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݽṹ).
{
uint8_t tx_data[6]; //<2F><><EFBFBD><EFBFBD>ÿ<EFBFBD><C3BF><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>byte(<28>ֽ<EFBFBD>)<29><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ԫ<EFBFBD>ظ<EFBFBD><D8B8><EFBFBD>Ϊ6
uint8_t rx_data[8]; //<2F><><EFBFBD>յ<EFBFBD><D5B5>ļĴ<C4BC><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 6 byte(<28>ֽ<EFBFBD>)+ 2 byte PEC(<28><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>)
uint8_t rx_pec_match; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ķ<EFBFBD>ȡcmd(ָ<><D6B8>)<29>ڼ<EFBFBD><DABC><EFBFBD><EFBFBD>⵽PEC(<28><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>)<29><><EFBFBD><EFBFBD>
}Reg_TypeDef;
typedef struct//ConfigA data structure(<28><><EFBFBD><EFBFBD>A<EFBFBD><41><EFBFBD>ݽṹ).
{
uint8_t gpio_pd_en; //GPIO<49><4F><EFBFBD><EFBFBD>ʹ<EFBFBD>ܣ<EFBFBD>ÿһλ<D2BB><CEBB>Ӧһ<D3A6><D2BB>IO<49><4F>
uint8_t gpio_analog_en; //GPIO0~7ģʽѡ<CABD><D1A1> 0:ģ<><C4A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1:<3A><>ͨGPIO
BOOLEAN adc_init_mode;
BOOLEAN rsvd2; //<2F><><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>Զ<EFBFBD><D4B6>0
BOOLEAN rsvd1; //<2F><><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>Զ<EFBFBD><D4B6>0
BOOLEAN osr_sel; //ADC<44><43><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѡ<EFBFBD><D1A1> 1:ADC<44><43><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ1024<32><34>2048<34><38>4096<39><36>4096 0:ADC<44><43><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ64<36><34>128<32><38>256<35><36>512
BOOLEAN refon; //VREF1(<28><>׼<EFBFBD><D7BC>ѹ)<29><><EFBFBD><EFBFBD> 1 :VREF1<46><31><EFBFBD><EFBFBD><EFBFBD>ϵ<EFBFBD>ֱ<EFBFBD><D6B1>WDT<44><54><EFBFBD><EFBFBD> 0 :ADCת<43><D7AA><EFBFBD><EFBFBD>֮<EFBFBD><D6AE>VREF1<46>ر<EFBFBD> (Ĭ<><C4AC>)
uint16_t uv_th; //Ƿѹ<C7B7><D1B9>ֵ
uint16_t ov_th; //<2F><>ѹ<EFBFBD><D1B9>ֵ
uint8_t rx_pec_match; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ķ<EFBFBD>ȡcmd(ָ<><D6B8>)<29>ڼ<EFBFBD><DABC><EFBFBD><EFBFBD>⵽PEC(<28><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>)<29><><EFBFBD><EFBFBD>
}ConfigA_TypeDef;
typedef struct//ConfigB data structure(<28><><EFBFBD><EFBFBD>B<EFBFBD><42><EFBFBD>ݽṹ).
{
uint16_t dcc; //<2F>ŵ<EFBFBD><C5B5><EFBFBD><EFBFBD>ؿ<EFBFBD><D8BF><EFBFBD>1:<3A><><EFBFBD><EFBFBD>Cell x <20>Ŀ<EFBFBD><C4BF><EFBFBD> 0:<3A>ر<EFBFBD>Cell x <20>Ŀ<EFBFBD><C4BF><EFBFBD> (Ĭ<><C4AC>)
uint8_t bl_duty_sel; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ռ<EFBFBD>ձ<EFBFBD>ѡ<EFBFBD><D1A1> ռ<>ձ<EFBFBD>=(BL_DUTY_SEL+1)*10%<25><><EFBFBD><EFBFBD><EFBFBD>÷<EFBFBD>Χ10%~100%<25><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>9ʱ<39><CAB1>100%<25><>
uint8_t dcto; //<2F>ŵ綨ʱ<E7B6A8><CAB1><EFBFBD><EFBFBD>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD>
uint16_t vuv_bl_th; //<2F><><EFBFBD><EFBFBD>Ƿѹ<C7B7><D1B9>ֵ
BOOLEAN dtmen; //<2F><><EFBFBD>Զ<EFBFBD><D4B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>£<EFBFBD><C2A3><EFBFBD><EFBFBD><EFBFBD>DTMEN=1<><31><EFBFBD><EFBFBD>Ƿѹ(С<><D0A1>VUV_BL)<29>رշŵ翪<C5B5>أ<EFBFBD><D8A3><EFBFBD><EFBFBD><EFBFBD>DTMEN=0<><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƿѹ<C7B7>Ƚ<EFBFBD>
uint8_t rx_pec_match; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ķ<EFBFBD>ȡcmd(ָ<><D6B8>)<29>ڼ<EFBFBD><DABC><EFBFBD><EFBFBD>⵽PEC(<28><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>)<29><><EFBFBD><EFBFBD>
}ConfigB_TypeDef;
typedef struct//ConfigC data structure(<28><><EFBFBD><EFBFBD>C<EFBFBD><43><EFBFBD>ݽṹ).
{
uint16_t vuv_m_th; //<2F><><EFBFBD><EFBFBD>ģʽ<C4A3>£<EFBFBD>Ƿѹ<C7B7><D1B9>ֵ
uint16_t vov_m_th; //<2F><><EFBFBD><EFBFBD>ģʽ<C4A3>£<EFBFBD><C2A3><EFBFBD>ѹ<EFBFBD><D1B9>ֵ
uint16_t itov_m_th; //<2F><><EFBFBD><EFBFBD>ģʽ<C4A3>£<EFBFBD><C2A3>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ
uint16_t extov_m_th; //<2F><><EFBFBD><EFBFBD>ģʽ<C4A3>£<EFBFBD><C2A3>ⲿ<EFBFBD><E2B2BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ
uint8_t rx_pec_match; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ķ<EFBFBD>ȡcmd(ָ<><D6B8>)<29>ڼ<EFBFBD><DABC><EFBFBD><EFBFBD>⵽PEC(<28><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>)<29><><EFBFBD><EFBFBD>
}ConfigC_TypeDef;
typedef struct//ConfigD data structure(<28><><EFBFBD><EFBFBD>D<EFBFBD><44><EFBFBD>ݽṹ).
{
uint16_t csel_m; //<2F><><EFBFBD><EFBFBD>ģʽ<C4A3>£<EFBFBD><C2A3><EFBFBD><EFBFBD>ص<EFBFBD>ѹ<EFBFBD><D1B9><EFBFBD><EFBFBD><EFBFBD>Ƚ<EFBFBD>ѡ<EFBFBD><D1A1> 1:<3A><>Ӧ<EFBFBD>ĵ<EFBFBD><C4B5>ؾͻ<D8BE><CDBB>ڼ<EFBFBD><DABC><EFBFBD>ģʽ<C4A3>½<EFBFBD><C2BD>й<EFBFBD>Ƿѹ<C7B7>Ƚϣ<C8BD><CFA3>ñ<EFBFBD>־λ
// 0:<3A><>Ӧ<EFBFBD>ĵ<EFBFBD><C4B5>ؾͻ<D8BE><CDBB>ڼ<EFBFBD><DABC><EFBFBD>ģʽ<C4A3>²<EFBFBD><C2B2><EFBFBD><EFBFBD>й<EFBFBD>Ƿѹ<C7B7>Ƚϣ<C8BD><CFA3><EFBFBD><EFBFBD>ñ<EFBFBD>־λ
uint8_t gsel_m; //<2F><><EFBFBD><EFBFBD>ģʽ<C4A3>£<EFBFBD>GPIO0~7<>Ƚ<EFBFBD>ѡ<EFBFBD><D1A1>
BOOLEAN isospi_wake_t; //isospi(<28>ջ<EFBFBD><D5BB><EFBFBD>SPI)<29><><EFBFBD><EFBFBD>ʱ<EFBFBD>䣬0:10us 1:20us
BOOLEAN adc_rst_sel; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>1<EFBFBD><31>ͨ<EFBFBD><CDA8>ADC<44><43>λѡ<CEBB><D1A1><EFBFBD><EFBFBD>0:<3A><><EFBFBD>в<EFBFBD><D0B2><EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λADC<44><43>1:ֻ<>е<EFBFBD>1<EFBFBD><31>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD>λADC<44><43>֮<EFBFBD><D6AE>2~nͨ<6E><CDA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λADC
uint8_t time_sel_m; //<2F><><EFBFBD><EFBFBD>ģʽ<C4A3>£<EFBFBD><C2A3><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ã<EFBFBD><C3A3><EFBFBD>ʱʱ<CAB1><CAB1>=(TIME_SEL_M+1)*1s(2~64s)<29><><EFBFBD><EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD>ֵ<EFBFBD><D6B5>1(2s)
uint8_t adc_init_t2; //ADC<44><43><EFBFBD><EFBFBD><EFBFBD><EFBFBD>2~n<><6E>ͨ<EFBFBD><CDA8>ADC<44><43>ʼ<EFBFBD><CABC>ʱ<EFBFBD>䣬(ADC_INIT_T2+1)*20us(20~320us)
uint8_t adc_init_t1; //ADC<44><43><EFBFBD><EFBFBD><EFBFBD><EFBFBD>1<EFBFBD><31>ͨ<EFBFBD><CDA8>ADC<44><43>ʼ<EFBFBD><CABC>ʱ<EFBFBD><CAB1>(ADC_INIT_T1+1)*100us(100~1600us)
BOOLEAN trim2_en; //<2F>޵<EFBFBD>2ʹ<32>ܣ<EFBFBD>1:ʹ<>ܣ<EFBFBD>0:<3A><>ʹ<EFBFBD><CAB9>
BOOLEAN trim1_en; //<2F>޵<EFBFBD>1ʹ<31>ܣ<EFBFBD>1:ʹ<>ܣ<EFBFBD>0:<3A><>ʹ<EFBFBD><CAB9>
uint8_t err_t_sel_m; //<2F><><EFBFBD><EFBFBD>ģʽ<C4A3>·<EFBFBD><C2B7><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD>ϱ<EFBFBD><CFB1>ļ<EFBFBD><C4BC><EFBFBD>ʱ<EFBFBD><CAB1> 00:200ms<6D><73>01:400ms<6D><73>10:600ms<6D><73>11:800ms
uint8_t vd33t_on_m; //<2F><><EFBFBD><EFBFBD>ģʽ<C4A3>£<EFBFBD>VREF1<46><31>VD33T<33><54><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(5+VD33T_ON_M*10)ms<6D><73><EFBFBD><EFBFBD>Χ<EFBFBD><CEA7>5~155ms
uint8_t rx_pec_match; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ķ<EFBFBD>ȡcmd(ָ<><D6B8>)<29>ڼ<EFBFBD><DABC><EFBFBD><EFBFBD>⵽PEC(<28><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>)<29><><EFBFBD><EFBFBD>
}ConfigD_TypeDef;
typedef struct//Cell Voltage data structure(<28><><EFBFBD>ص<EFBFBD>ѹ<EFBFBD><D1B9><EFBFBD>ݽṹ).
{
//<2F><>Ϊ<EFBFBD><CEAA>16<31>ڵ<EFBFBD><DAB5>أ<EFBFBD><D8A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч<EFBFBD><D0A7>Ϊ16<31><36>
uint16_t cellVoltage[16];
//<2F><>Ϊ<EFBFBD><CEAA>ABCDEF<45><46><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ص<EFBFBD>ѹ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>
uint8_t pec_match[6]; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ķ<EFBFBD>ȡcmd(ָ<><D6B8>)<29>ڼ<EFBFBD><DABC><EFBFBD><EFBFBD>⵽PEC(<28><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>)<29><><EFBFBD><EFBFBD>
}CellVoltage_TypeDef;
typedef struct//AUX Reg Voltage Data structure(GPIO<49>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ѹ<EFBFBD><D1B9><EFBFBD>ݽṹ)
{
uint16_t gpioVoltage[9]; //GPIO Voltage Codes(<28><><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>е<EFBFBD>G0V~G7V)GPIOA<4F><41>B<EFBFBD><42>C(8<><38>GPIO + 1<><31>VD33T)
uint8_t pec_match[3]; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ķ<EFBFBD>ȡcmd(ָ<><D6B8>)<29>ڼ<EFBFBD><DABC><EFBFBD><EFBFBD>⵽PEC(<28><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>)<29><><EFBFBD><EFBFBD>
}GPIOReg_TypeDef;
typedef struct//Status Reg data structure(״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݽṹ)
{
uint16_t stat_codes[8]; //A two dimensional array of the stat voltage codes(ͳ<>Ƶ<EFBFBD>ѹ<EFBFBD><D1B9><EFBFBD><EFBFBD><EFBFBD>Ķ<EFBFBD>ά<EFBFBD><CEAC><EFBFBD><EFBFBD>)
uint8_t uvOvFlags[4]; //byte array that contains the uv/ov flag data(<28><><EFBFBD><EFBFBD>uv/ov<6F><76>־<EFBFBD><D6BE><EFBFBD>ݵ<EFBFBD><DDB5>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>)
uint16_t cellUvFlag; //<2F><><EFBFBD><EFBFBD>Ƿѹ<C7B7><D1B9>־λ<D6BE><CEBB>ÿ<EFBFBD><C3BF>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־ÿ<D6BE><C3BF><EFBFBD><EFBFBD><EFBFBD>ص<EFBFBD>Ƿѹ<C7B7><D1B9>־λ
uint16_t cellOvFlag; //<2F><><EFBFBD>ع<EFBFBD>ѹ<EFBFBD><D1B9>־λ<D6BE><CEBB>ÿ<EFBFBD><C3BF>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־ÿ<D6BE><C3BF><EFBFBD><EFBFBD><EFBFBD>صĹ<D8B5>ѹ<EFBFBD><D1B9>־λ
uint8_t cfg_err; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><D0A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־(<28><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ż<EFBFBD><C5BC><EFBFBD><EFBFBD>У<EFBFBD><D0A3><EFBFBD><EFBFBD>ECCУ<43><D0A3>)
uint8_t pec_err; //ָ<><D6B8><EFBFBD><EFBFBD><EFBFBD>ݵ<EFBFBD>PECУ<43><D0A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־
uint8_t extov; //<2F><><EFBFBD><EFBFBD>ģʽ<C4A3>£<EFBFBD><C2A3>ⲿ<EFBFBD><EFBFBD>(gpio)<29><><EFBFBD>±<EFBFBD>־
uint8_t itov; //<2F><><EFBFBD><EFBFBD>ģʽ<C4A3>£<EFBFBD><C2A3>ڲ<EFBFBD><DAB2><EFBFBD>(vtemp)<29><><EFBFBD>±<EFBFBD>־
uint8_t htov2; //Ӳ<><D3B2><EFBFBD><EFBFBD>(95<39><35>)<29><><EFBFBD>±<EFBFBD>־<EFBFBD><D6BE> 1:Ӳ<><D3B2><EFBFBD>¶ȹ<C2B6><C8B9>£<EFBFBD>0:Ӳ<><D3B2><EFBFBD>¶Ȳ<C2B6><C8B2><EFBFBD><EFBFBD><EFBFBD>
uint8_t htov1; //Ӳ<><D3B2><EFBFBD><EFBFBD>(125<32><35>)<29><><EFBFBD>±<EFBFBD>־<EFBFBD><D6BE>1:Ӳ<><D3B2><EFBFBD>¶ȹ<C2B6><C8B9>£<EFBFBD>0:Ӳ<><D3B2><EFBFBD>¶Ȳ<C2B6><C8B2><EFBFBD><EFBFBD><EFBFBD>
uint8_t mux_fail; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Խ<EFBFBD><D4BD><EFBFBD><EFBFBD><EFBFBD> 0 : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȷ 1: <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t mode_state; //ģʽ״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD> 00:standbyģʽ 01:<3A><><EFBFBD><EFBFBD>ģʽ 10:<3A><><EFBFBD><EFBFBD>ģʽ 11:<3A><><EFBFBD><EFBFBD>λ(sleepģʽ<C4A3>ر<EFBFBD>ʱ<EFBFBD>ӣ<EFBFBD><D3A3><EFBFBD><EFBFBD>ܶ<EFBFBD><DCB6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬)
uint8_t rst_state; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><CEBB>־<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>
uint8_t pec_match[4]; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ķ<EFBFBD>ȡcmd(ָ<><D6B8>)<29>ڼ<EFBFBD><DABC><EFBFBD><EFBFBD>⵽PEC(<28><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>)<29><><EFBFBD><EFBFBD>
}StateReg_TypeDef; //A<><41>B<EFBFBD><42>C<EFBFBD><43>D<EFBFBD>ĸ<EFBFBD>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD>
/***************************<2A><>Ҫ<EFBFBD>޸ĵĺ<C4B5><C4BA><EFBFBD>********************************************
*<EFBFBD><EFBFBD><EFBFBD>а<EFBFBD><EFBFBD><EFBFBD>
*ƬѡCS :<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:cs_low()<EFBFBD><EFBFBD>cs_high()<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Է<EFBFBD><EFBFBD><EFBFBD>:cs_low_reverse()<EFBFBD><EFBFBD>cs_high_reverse()
*<EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD> :delay_us
*SPI<EFBFBD>ӿ<EFBFBD> :SPI1_ReadWriteByte<EFBFBD><EFBFBD>SPI2_ReadWriteByte
*********************************END************************************************/
#define cs_low() drv_gpio_set_pin_status(kGpioType_SPI1_Cs, kGpioStatus_Low);//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD>ŵ<EFBFBD>ƬѡCS<43><53><EFBFBD><EFBFBD>Ϊ<EFBFBD>͵<EFBFBD>ƽ
#define cs_high() drv_gpio_set_pin_status(kGpioType_SPI1_Cs, kGpioStatus_High)//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD>ŵ<EFBFBD>ƬѡCS<43><53><EFBFBD><EFBFBD>Ϊ<EFBFBD>ߵ<EFBFBD>ƽ
#define cs_low_reverse() drv_gpio_set_pin_status(kGpioType_SPI2_Cs, kGpioStatus_Low);//{PDout(8) = 0U;}//<2F><><EFBFBD><EFBFBD><EFBFBD>Է<EFBFBD><D4B7><EFBFBD>ͨ<EFBFBD>ŵ<EFBFBD>ƬѡCS<43><53><EFBFBD><EFBFBD>Ϊ<EFBFBD>͵<EFBFBD>ƽ
#define cs_high_reverse() drv_gpio_set_pin_status(kGpioType_SPI2_Cs, kGpioStatus_High);//<2F><><EFBFBD><EFBFBD><EFBFBD>Է<EFBFBD><D4B7><EFBFBD>ͨ<EFBFBD>ŵ<EFBFBD>ƬѡCS<43><53><EFBFBD><EFBFBD>Ϊ<EFBFBD>ߵ<EFBFBD>ƽ
//<2F><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
extern void delay_us(uint32_t nus);
//TxData <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>8λ<38><CEBB>16λ<36>ģ<EFBFBD><C4A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>SPI֮ǰ<D6AE><C7B0>ȷ<EFBFBD><C8B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>֡<EFBFBD><D6A1>ʽ
extern uint8_t SPI1_ReadWriteByte(uint8_t TxData);
//TxData <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>8λ<38><CEBB>16λ<36>ģ<EFBFBD><C4A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>SPI֮ǰ<D6AE><C7B0>ȷ<EFBFBD><C8B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>֡<EFBFBD><D6A1>ʽ
extern uint8_t SPI2_ReadWriteByte(uint8_t TxData);
//Wake isoSPI up from idle state(<28><><EFBFBD>ջ<EFBFBD><D5BB><EFBFBD>SPI<50>ӿ<EFBFBD><D3BF><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD>)
void wakeup_idle(uint8_t total_ic);
///Generic wakeup command to wake the BF8915A from sleep(<28><>BF8915A<35><41>˯<EFBFBD><CBAF><EFBFBD>л<EFBFBD><D0BB>ѵ<EFBFBD>ͨ<EFBFBD>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>)
void wakeup_sleep(uint8_t total_ic);
//Writes an array of bytes out of the SPI port(<28><><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4>SPI<50>˿<EFBFBD>)
void spi_write_array(uint8_t len,uint8_t writeData[]);
//Generic function to write BF8915A commands. Function calculated PEC for tx_cmd data(<28><>дBF8915A<35><41><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD>ú<EFBFBD><C3BA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊcmd<6D><64><EFBFBD>ݼ<EFBFBD><DDBC><EFBFBD><EFBFBD>˼<EFBFBD><CBBC><EFBFBD><EFBFBD><EFBFBD>)
void BF8915A_cmd(uint8_t tx_cmd[2]);
//Generic function to write BF8915A commands and write payload data. Function calculated PEC for tx_cmd data(дBF8915A<35><41><EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4>Ч<EFBFBD>غ<EFBFBD><D8BA><EFBFBD><EFBFBD>ݵ<EFBFBD>ͨ<EFBFBD>ú<EFBFBD><C3BA><EFBFBD><EFBFBD><EFBFBD>tx_cmd<6D><64><EFBFBD>ݵĺ<DDB5><C4BA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>)
void BF8915A_write(uint8_t total_ic ,uint8_t tx_cmd[2],uint8_t write_data[]);//Writes an array of data to the daisy chain (<28><>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD>ջ<EFBFBD><D5BB><EFBFBD>)
//Issues a command onto the daisy chain and reads back 6*total_ic data in the rx_data array(<28><><EFBFBD>ջ<EFBFBD><D5BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ض<EFBFBD>rx_data<74><61><EFBFBD><EFBFBD><EFBFBD>е<EFBFBD>6<EFBFBD><36>IC(8915A)<29><><EFBFBD><EFBFBD>)
uint8_t BF8915A_read(uint8_t total_ic,uint8_t tx_cmd[2],uint8_t *rx_data);
//Calculates and returns the CRC15(<28><><EFBFBD>㲢<EFBFBD><E3B2A2><EFBFBD><EFBFBD>15λѭ<CEBB><D1AD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><D0A3>ֵ)
uint16_t pec15_calc(uint8_t len,uint8_t *pecData);
//Write the BF8915A CFGRA(дBF8915A<35><41><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD><EFBFBD><EFBFBD>A)
void BF8915A_wrcfga(uint8_t total_ic,ConfigA_TypeDef configAData[]);
//Write the BF8915A CFGRB(дBF8915A<35><41><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD><EFBFBD><EFBFBD>B)
void BF8915A_wrcfgb(uint8_t total_ic,ConfigB_TypeDef configBData[]);
//Write the BF8915A CFGRC(дBF8915A<35><41><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD><EFBFBD><EFBFBD>C)
void BF8915A_wrcfgc(uint8_t total_ic,ConfigC_TypeDef configCData[]);
//Write the BF8915A CFGRD(дBF8915A<35><41><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD><EFBFBD><EFBFBD>D)
void BF8915A_wrcfgd(uint8_t total_ic,ConfigD_TypeDef configDData[]);
//Reads the BF8915A CFGRA register(<28><>BF8915A<35><41><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD><EFBFBD><EFBFBD>A)
uint8_t BF8915A_rdcfga(uint8_t total_ic,ConfigA_TypeDef configAData[]);
//Reads the BF8915A CFGRB register(<28><>BF8915A<35><41><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD><EFBFBD><EFBFBD>B)
uint8_t BF8915A_rdcfgb(uint8_t total_ic,ConfigB_TypeDef configBData[]);
//Reads the BF8915A CFGRC register(<28><>BF8915A<35><41><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD><EFBFBD><EFBFBD>C)
uint8_t BF8915A_rdcfgc(uint8_t total_ic,ConfigC_TypeDef configCData[]);
//Reads the BF8915A CFGRD register(<28><>BF8915A<35><41><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD><EFBFBD><EFBFBD>D)
uint8_t BF8915A_rdcfgd(uint8_t total_ic,ConfigD_TypeDef configDData[]);
// Reads the raw cell voltage register data(<28><>ȡԭʼ<D4AD><CABC><EFBFBD>ص<EFBFBD>ѹ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>)
void BF8915A_rdcv_reg(uint8_t reg,uint8_t total_ic,uint8_t *cellData);
//reads BF8915A GPIO registers(<28><>ȡBF8915A<35><41>GPIO<49>Ĵ<EFBFBD><C4B4><EFBFBD>)
void BF8915A_rdgv_reg(uint8_t reg,uint8_t total_ic,uint8_t *gpioData);
//Reads BF8915A stat registers(<28><>ȡBF8915A״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD>)
void BF8915A_rdstat_reg(uint8_t reg,uint8_t total_ic,uint8_t *statData);
//ADCV CMD(<28><><EFBFBD>ص<EFBFBD>ѹADCת<43><D7AA>ָ<EFBFBD><D6B8>)
void BF8915A_adcv(uint8_t CLKSEL,uint8_t OSR,uint8_t DISCP,uint8_t CSEL);
//ADCOW CMD(<28><><EFBFBD>ض<EFBFBD><D8B6>ߵ<EFBFBD>ѹADCת<43><D7AA>ָ<EFBFBD><D6B8>)
void BF8915A_adcow(uint8_t CLKSEL,uint8_t OSR,uint8_t DISCP,uint8_t CSEL);
//CVST CMD(<28><><EFBFBD>ص<EFBFBD>ѹ<EFBFBD>Բ<EFBFBD><D4B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>)
void BF8915A_cvst(uint8_t CLKSEL,uint8_t OSR,uint8_t SFTEST);
//ADOL CMD(<28><><EFBFBD><EFBFBD><EFBFBD>ص<EFBFBD><D8B5><EFBFBD>Ԫ<EFBFBD><D4AA><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>)
void BF8915A_adol(uint8_t CLKSEL,uint8_t OSR,uint8_t DISCP);
//ADGP CMD(GPIO ADCת<43><D7AA>ָ<EFBFBD><D6B8>)
void BF8915A_adgp(uint8_t CLKSEL,uint8_t OSR,uint8_t GSEL);
//GPST CMD(GPIO<49><4F><EFBFBD><EFBFBD><EFBFBD>Բ<EFBFBD><D4B2><EFBFBD>ָ<EFBFBD><D6B8>)
void BF8915A_gpst(uint8_t CLKSEL,uint8_t OSR,uint8_t SFTEST);
//ADSTAT CMD(<28><><EFBFBD><EFBFBD><EFBFBD>ڲ<EFBFBD><DAB2>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>)
void BF8915A_adstat(uint8_t CLKSEL,uint8_t OSR,uint8_t STSEL);
//STATST CMD(<28>Բ<EFBFBD><D4B2><EFBFBD><EFBFBD>ڲ<EFBFBD><DAB2>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>)
void BF8915A_statst(uint8_t CLKSEL,uint8_t OSR,uint8_t SFTEST);
//ADCVGP CMD(<28><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ص<EFBFBD>ѹ<EFBFBD><D1B9>GPIO<49><4F><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>)
void BF8915A_adcvgp(uint8_t CLKSEL,uint8_t OSR,uint8_t DISCP);
//MNT CMD(<28><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>)
void BF8915A_mnt(uint8_t CLKSEL, uint8_t OSR,uint8_t MNMOD,uint8_t STRMN,uint8_t BLEN);
//STRBL CMD(<28><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>)
void BF8915A_strbl(uint8_t CLKSEL,uint8_t OSR,uint8_t OESEL,uint8_t BLEN);
//Clear Cell Register(<28><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ԫ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>)
void BF8915A_clrcell(void);
//Clear GPIO Register(<28><><EFBFBD><EFBFBD>GPIO<49>Ĵ<EFBFBD><C4B4><EFBFBD>)
void BF8915A_clrgp(void);
//Clear STATE Register(<28><><EFBFBD><EFBFBD>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD>)
void BF8915A_clrstat(void);
//PLADC CMD(<28><>ѯADCת<43><D7AA>״ָ̬<CCAC><D6B8>)
uint8_t BF8915A_pladc(void);
//soft reset(<28><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ)
void BF8915A_softrst(void);
//Helper function that parses voltage measurement registers(<28><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѹ<EFBFBD><D1B9><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>ĸ<EFBFBD><C4B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>)
uint8_t parse_cells(uint8_t current_ic,uint8_t cell_reg,uint8_t cell_data[],uint16_t *cell_codes,uint8_t *ic_pec);
//Reads and parses the BF8915A cell voltage registers(<28><>ȡ<EFBFBD>ͽ<EFBFBD><CDBD><EFBFBD>BF8915A<35><41><EFBFBD>ص<EFBFBD>ѹ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>)
uint8_t BF8915A_rdcv(uint8_t reg,uint8_t total_ic,CellVoltage_TypeDef *cellVoltage);
//Reads and parses the BF8915A GPIO registers(<28><>ȡ<EFBFBD>ͽ<EFBFBD><CDBD><EFBFBD>BF8915A<35><41>GPIO<49>Ĵ<EFBFBD><C4B4><EFBFBD>)
uint8_t BF8915A_rdgv(uint8_t reg,uint8_t total_ic,GPIOReg_TypeDef *gpioVoltage);
//Reads and parses the BF8915A stat registers(<28><>ȡ<EFBFBD>ͽ<EFBFBD><CDBD><EFBFBD>BF8915A״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD>)
uint8_t BF8915A_rdstat(uint8_t reg,uint8_t total_ic,StateReg_TypeDef *stateReg);
#endif