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BCU/library/drv_peripheral/drv_ads8688.c

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/******************************************************************************
* @file drv_adbms1818.c
* @brief ads8688 drivers
* @version V1.0
* @author Gary
* @copyright
******************************************************************************/
#include "drv_ads8688.h"
#include "drv_spi.h"
#include "kit_time.h"
void drv_set_ads8688_cs(GpioStatus state)
{
drv_gpio_set_pin_status(kGpioType_ADC_Cs, state);
}
void drv_set_ads8688_rst(GpioStatus state)
{
drv_gpio_set_pin_status(kGpioType_ADC_Reset, state);
}
uint8_t drv_ads8688_spi_send_rev(uint8_t data)
{
return drv_spi_sync_send_rev(kSpiDev_2, data);
}
// <20><>ʼ<EFBFBD><CABC>ADS8688<38><38><EFBFBD><EFBFBD><EFBFBD>Ҽ<EFBFBD><D2BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݺ<EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD>Ƿ<EFBFBD>һ<EFBFBD><D2BB>
// <20><><EFBFBD><EFBFBD>TURE<52><45>˵<EFBFBD><CBB5><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
bool drv_ads8688_Init(void)
{
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uint8_t i = 0, value = 0;
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drv_spi_init(kSpiDev_2, kSpiFreq_Div256, kSpiMode_C0E1, SpiFrame_MSBFirst, kGpioType_ADC_Clk, kGpioType_ADC_Miso, kGpioType_ADC_Mosi);
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drv_reset_ads8688();
OSTimeDly(20);
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OSTimeDly(20);
drv_enter_standby_mode();
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drv_enter_pwrdn_mode();
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OSTimeDly(20);
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drv_set_ch_range(Channel_0_Input_Range,VREF_125_125);
drv_set_ch_range(Channel_1_Input_Range,VREF_125_125);
drv_set_ch_range(Channel_2_Input_Range,VREF_125_125);
drv_set_ch_range(Channel_3_Input_Range,VREF_125_125);
drv_set_ch_range(Channel_4_Input_Range,VREF_125_125);
drv_set_ch_range(Channel_5_Input_Range,VREF_125_125);
//value = drv_ads8688_read_reg(Channel_0_Input_Range);
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drv_set_ch_pwrdn(Channel_6_Input_Range);
drv_set_ch_pwrdn(Channel_7_Input_Range);
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#if ADC_AUTO_MODE
{
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drv_ads8688_write_reg(AUTO_SEQ_EN, 0x3F);
i = drv_ads8688_read_reg(AUTO_SEQ_EN);
if (i != 0x3F)
{
return true;
}
else
{
drv_enter_auto_rst_mode(); // <20><><EFBFBD><EFBFBD><EFBFBD>Զ<EFBFBD>ɨ<EFBFBD><C9A8>ģʽ
OSTimeDly(20);
return false;
}
}
#else
{
drv_manual_chn_mode(MAN_Ch_0);
drv_manual_chn_mode(MAN_Ch_1);
drv_manual_chn_mode(MAN_Ch_2);
drv_manual_chn_mode(MAN_Ch_3);
drv_manual_chn_mode(MAN_Ch_4);
drv_manual_chn_mode(MAN_Ch_5);
return false;
}
#endif
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}
void drv_ads8688_Reset(void) // hardware reset
{
uint8_t i = 5;
drv_set_ads8688_rst(kGpioStatus_Low);
OSTimeDly(10);
while (i--)
;
drv_set_ads8688_rst(kGpioStatus_High);
}
void drv_ads8688_pwrdn(void) // hardware power-down
{
uint8_t i = 50;
drv_set_ads8688_rst(kGpioStatus_Low);
while (i--)
;
}
void drv_ads8688_pwrup(void) // power-down
{
drv_set_ads8688_rst(kGpioStatus_High);
}
void drv_ads8688_write_cmd_reg(uint16_t command) // дADS8688<38><38><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>
{
drv_set_ads8688_cs(kGpioStatus_Low);
drv_ads8688_spi_send_rev(command >> 8 & 0xFF);
drv_ads8688_spi_send_rev(command & 0xFF);
drv_set_ads8688_cs(kGpioStatus_High);
}
void drv_reset_ads8688(void) // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λģʽ<C4A3><CABD><EFBFBD><EFBFBD>λ program registers
{
drv_ads8688_write_cmd_reg(RST);
}
// <20><><EFBFBD><EFBFBD>STDBYģʽ<C4A3><CABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͺ<EFBFBD>CS<43><53><EFBFBD><EFBFBD><EFBFBD>øߣ<C3B8><DFA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>֡<EFBFBD><D6A1>
// <20>˳<EFBFBD><CBB3><EFBFBD>ģʽ<C4A3><CABD>ִ<EFBFBD><D6B4>AUTO_RST<53><54><EFBFBD><EFBFBD>MAN_CH_n<5F><6E><EFBFBD><EFBFBD><EEA3AC><EFBFBD><EFBFBD>Ҫ<EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD>20us<75>Ա<EFBFBD>֤<EFBFBD><D6A4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݵ<EFBFBD>ADת<44><D7AA>
void drv_enter_standby_mode(void)
{
drv_ads8688_write_cmd_reg(STDBY);
}
// <20><><EFBFBD><EFBFBD>PWR_DNģʽ<C4A3><CABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͺ<EFBFBD>CS<43><53><EFBFBD><EFBFBD><EFBFBD>øߣ<C3B8><DFA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>֡<EFBFBD><D6A1>
// <20>˳<EFBFBD><CBB3><EFBFBD>ģʽ<C4A3><CABD>ִ<EFBFBD><D6B4>AUTO_RST<53><54><EFBFBD><EFBFBD>MAN_CH_n<5F><6E><EFBFBD><EFBFBD><EEA3AC><EFBFBD><EFBFBD>Ҫ<EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD>15ms<6D>Ա<EFBFBD>֤<EFBFBD><D6A4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݵ<EFBFBD>ADת<44><D7AA>
void drv_enter_pwrdn_mode(void) // <20><>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʽ<EFBFBD><CABD><EFBFBD><EFBFBD>PWR_DNģʽ<C4A3><CABD><EFBFBD><EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>ʽ<EFBFBD><CABD><EFBFBD><EFBFBD><EFBFBD>Dz<EFBFBD><C7B2>ı<EFBFBD> program registers
{
drv_ads8688_write_cmd_reg(PWR_DN);
}
void drv_enter_auto_rst_mode(void) // <20><><EFBFBD><EFBFBD><EFBFBD>Զ<EFBFBD>ɨ<EFBFBD><C9A8>ģʽ
{
drv_ads8688_write_cmd_reg(AUTO_RST);
}
// <20><>ȡɨ<C8A1><C9A8>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD><EFBFBD>е<EFBFBD>ADת<44><D7AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>code<64><65><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
void drv_enter_auto_rst_mode_Data(uint16_t *outputdata, uint8_t chnum)
{
uint8_t i = 0, datal = 0, datah = 0;
uint16_t data = 0;
for (i = 0; i < chnum; i++)
{
drv_set_ads8688_cs(kGpioStatus_Low);
drv_ads8688_spi_send_rev(0x00);
drv_ads8688_spi_send_rev(0x00);
datah = drv_ads8688_spi_send_rev(0xFF);
datal = drv_ads8688_spi_send_rev(0xFF);
drv_set_ads8688_cs(kGpioStatus_High);
data = datah << 8 | datal; // <20><>λ<EFBFBD><CEBB>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>λ<EFBFBD>ں<EFBFBD>
*(outputdata + i) = data;
}
}
void drv_manual_chn_mode(uint16_t ch) // <20>ֶ<EFBFBD>ģʽ
{
drv_ads8688_write_cmd_reg(ch);
}
// <20><>ȡ<EFBFBD>ֶ<EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD>ADת<44><D7AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>code
uint16_t drv_manual_chn_mode_Data(void)
{
uint8_t datah = 0, datal = 0;
drv_set_ads8688_cs(kGpioStatus_Low);
drv_ads8688_spi_send_rev(0x00);
drv_ads8688_spi_send_rev(0x00);
datah = drv_ads8688_spi_send_rev(0xFF);
datal = drv_ads8688_spi_send_rev(0xFF);
drv_set_ads8688_cs(kGpioStatus_High);
return (datah << 8 | datal);
}
//Gary add function
uint16_t drv_get_ads8688_ch_data(uint16_t ch)
{
drv_manual_chn_mode(ch);
return drv_manual_chn_mode_Data();
}
// Program Registerд<72><D0B4><EFBFBD><EFBFBD>
void drv_ads8688_write_reg(uint8_t Addr, uint8_t data)
{
drv_set_ads8688_cs(kGpioStatus_Low);
drv_ads8688_spi_send_rev(Addr << 1 | WRITE);
drv_ads8688_spi_send_rev(data);
drv_set_ads8688_cs(kGpioStatus_High);
}
// Program Register<65><72><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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uint16_t drv_ads8688_read_reg(uint8_t Addr)
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{
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uint8_t datah = 0,datal = 0;
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drv_set_ads8688_cs(kGpioStatus_Low);
drv_ads8688_spi_send_rev(Addr << 1 | READ);
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datah = drv_ads8688_spi_send_rev(0xFF);
datal = drv_ads8688_spi_send_rev(0xFF);
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drv_set_ads8688_cs(kGpioStatus_High);
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return datal + (datah << 8);
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}
void drv_set_auto_scan_sequence(uint8_t seq) // <20><><EFBFBD><EFBFBD><EFBFBD>Զ<EFBFBD>ɨ<EFBFBD><C9A8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD><CDA8>
{
drv_ads8688_write_reg(0x01, seq);
}
void drv_set_ch_pwrdn(uint8_t chn) // <20><><EFBFBD><EFBFBD>ͨ<EFBFBD><CDA8>nΪPower Down
{
drv_ads8688_write_reg(0X02, chn);
}
void drv_set_ch_range(uint8_t ch, uint8_t range) // <20><><EFBFBD>ø<EFBFBD><C3B8><EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD>ķ<EFBFBD>Χ
{
drv_ads8688_write_reg(ch, range);
}
int16_t drv_ads8688_value(uint16_t value)
{
int32_t ret = 0;
uint16_t tmp = 0;
tmp = value & 0x7FFF;
if(KIT_GET_BIT_VAL(value, 15) == 1)
{
return tmp;
}
else
{
return -tmp;
}
}