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4000modbus

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guzz 2025-02-25 14:58:14 +08:00
parent 091a70874e
commit 25aaac1080
14 changed files with 10269 additions and 1323 deletions

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@ -226,7 +226,7 @@ const GpioStatus relay_status_to_ctrl[kDoStatus_End] ={kGpioStatus_Low, kGpioSta
void bms_poll_di_do(uint32_t base_time)
{
uint32_t i;
uint32_t i,j = 0;
DoStatus rly_st;
if(do_item.bmsCircuitCtrl != NULL)
@ -248,6 +248,10 @@ void bms_poll_di_do(uint32_t base_time)
do_item.tick[i] = 0;
rly_st = do_item.ctrl_status[i];
do_item.actual_status[i] = rly_st;
if((relay_status_to_ctrl[rly_st] == kGpioStatus_Low) && (i == 1))
{
j = 1;
}
drv_gpio_set_pin_status(do_item.relay_start_io + i, relay_status_to_ctrl[rly_st]);
}
else

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@ -295,17 +295,18 @@ void get_ad_sample(void)
drv_enter_auto_rst_mode_Data(outputdata, 6);
#else
outputdata[i] = drv_get_ads8688_ch_data(MAN_Ch_0);
i += 1;
outputdata[i] = drv_get_ads8688_ch_data(MAN_Ch_1);
i += 1;
outputdata[i] = drv_get_ads8688_ch_data(MAN_Ch_2);
i += 1;
outputdata[i] = drv_get_ads8688_ch_data(MAN_Ch_3);
i += 1;
outputdata[i] = drv_get_ads8688_ch_data(MAN_Ch_4);
i += 1;
outputdata[i] = drv_get_ads8688_ch_data(MAN_Ch_5);
i += 1;
// i += 1;
// outputdata[i] = drv_get_ads8688_ch_data(MAN_Ch_1);
// i += 1;
// outputdata[i] = drv_get_ads8688_ch_data(MAN_Ch_2);
// i += 1;
// outputdata[i] = drv_get_ads8688_ch_data(MAN_Ch_3);
// i += 1;
// outputdata[i] = drv_get_ads8688_ch_data(MAN_Ch_4);
// i += 1;
// outputdata[i] = drv_get_ads8688_ch_data(MAN_Ch_5);
// i += 1;
#endif
for (i = 0; i < kAdIc_End; i++)

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@ -599,7 +599,7 @@ void bms_integral_soc(int32_t current, uint16_t base_time)
sox_item.tmp_chg_cap += tmp_32u;
//单位 kWms
//tmp_32少除了100这里应该多除个100,2.20
//tmp_32少除了100这里应该多除个100--2.20
sox_item.tmp_chg_energy += tmp_32u * total_volt / 1000000;
if(sox_item.calculate_cap < sox_item.rated_cap)
@ -646,7 +646,7 @@ void bms_integral_soc(int32_t current, uint16_t base_time)
sox_item.tmp_dis_cap += tmp_32u;
//单位 kWms
sox_item.tmp_dis_energy += tmp_32u * total_volt / 10000;
sox_item.tmp_dis_energy += tmp_32u * total_volt / 1000000;
if(sox_item.calculate_cap > 0)
{

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@ -23,26 +23,26 @@ typedef enum
typedef enum
{
kCumulateData_DayDisTime,
kCumulateData_DayDisTime, //0
kCumulateData_DayChgTime,
kCumulateData_SigDisTime,
kCumulateData_SigDisCap,
kCumulateData_SigDisEnergy,
kCumulateData_SigChgTime,
kCumulateData_SigChgTime, //5
kCumulateData_SigChgCap,
kCumulateData_SigChgEnergy,
kCumulateData_DayDisCap,
kCumulateData_DayDisEnergy,
kCumulateData_DayChgCap,
kCumulateData_DayChgCap, //10
kCumulateData_DayChgEnergy,
kCumulateData_AccDisTime,
kCumulateData_AccDisCap,
kCumulateData_AccDisEnergy,
kCumulateData_AccChgTime,
kCumulateData_AccChgCap,
kCumulateData_AccChgCap, //16
kCumulateData_AccChgEnergy,
kCumulateData_End,
}CumulateData;

File diff suppressed because one or more lines are too long

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@ -50,7 +50,7 @@
<InvalidFlash>1</InvalidFlash>
</TargetStatus>
<OutputDirectory>.\Objects\</OutputDirectory>
<OutputName>BCU_APP</OutputName>
<OutputName>BCU_APP2</OutputName>
<CreateExecutable>1</CreateExecutable>
<CreateLib>0</CreateLib>
<CreateHexFile>1</CreateHexFile>
@ -83,7 +83,7 @@
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name>fromelf --m32combined --output=@L.s19 .\Objects\@L.axf</UserProg1Name>
<UserProg1Name>D:\Soft\Setup\Keil\ARM\ARM_Compiler_5.06u7\bin\fromelf.exe --bin -o D:\Code\BMS\BCU\app/BCU_APP2.bin D:\Code\BMS\BCU\app/BCU_APP2.axf"</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>

File diff suppressed because it is too large Load Diff

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@ -1271,9 +1271,24 @@ BspMdExCode bcu_modbus_485_0x10_fun(uint16_t start_addr, uint16_t reg_num, uint8
bcu_data_set_0x06_msg(start_addr + i, data);
}
}
//@wangk , 2-25, add 0x10function(4000~4449)
else if((start_addr >= 4000) && (start_addr <= 4449))
{
uint16_t *reg_data = (uint16_t *)buf;
for (uint16_t i = 0; i < reg_num; i++)
{
uint16_t reg_value = (reg_data[i] >> 8) | (reg_data[i] << 8);
uint16_t offset_addr = start_addr - 4000 + i;
if (!hmi_write_modbus_cfg(offset_addr, reg_value))
{
err = kBspMdEx_InvalidAddr;
}
}
}
else
{
err = kBspMdEx_InvalidAddr;
err = kBspMdEx_InvalidAddr;
}
return err;
}

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@ -10,15 +10,15 @@
<TargetName>stm32f407</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<pArmCC>5060960::V5.06 update 7 (build 960)::.\ARMCC</pArmCC>
<pCCUsed>5060960::V5.06 update 7 (build 960)::.\ARMCC</pCCUsed>
<pArmCC>5060960::V5.06 update 7 (build 960)::.\ARM_Compiler_5.06u7</pArmCC>
<pCCUsed>5060960::V5.06 update 7 (build 960)::.\ARM_Compiler_5.06u7</pCCUsed>
<uAC6>0</uAC6>
<TargetOption>
<TargetCommonOption>
<Device>STM32F407ZGTx</Device>
<Vendor>STMicroelectronics</Vendor>
<PackID>Keil.STM32F4xx_DFP.2.14.0</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<PackID>Keil.STM32F4xx_DFP.3.0.0</PackID>
<PackURL>https://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x10000000,0x00010000) IROM(0x08000000,0x00100000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
<StartupFile></StartupFile>
@ -187,6 +187,7 @@
<RvdsVP>2</RvdsVP>
<RvdsMve>0</RvdsMve>
<RvdsCdeCp>0</RvdsCdeCp>
<nBranchProt>0</nBranchProt>
<hadIRAM2>1</hadIRAM2>
<hadIROM2>0</hadIROM2>
<StupSel>8</StupSel>

File diff suppressed because it is too large Load Diff

File diff suppressed because one or more lines are too long

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@ -518,8 +518,8 @@ void SystemInit(void)
/* Configure the System clock source, PLL Multiplier and Divider factors,
AHB/APBx prescalers and Flash settings ----------------------------------*/
//SetSysClock();
SystemClock_Config();
SetSysClock();
//SystemClock_Config();
/* Configure the Vector Table location add offset address ------------------*/
#ifdef VECT_TAB_SRAM
@ -573,6 +573,7 @@ void SystemCoreClockUpdate(void)
#endif /* STM32F412xG || STM32F413_423xx || STM32F446xx */
/* Get SYSCLK source -------------------------------------------------------*/
tmp = RCC->CFGR & RCC_CFGR_SWS;
//tmp = RCC_CFGR_SWS_HSE;
switch (tmp)
{
@ -711,7 +712,7 @@ void SystemClock_Config(void)
RCC->CFGR |= RCC_CFGR_PPRE2_DIV2;
/* PCLK1 = HCLK / 4 */
RCC->CFGR |= RCC_CFGR_PPRE1_DIV4;
RCC->CFGR |= RCC_CFGR_PPRE1_DIV8;
/* Configure the main PLL for 168 MHz using HSI */
RCC->PLLCFGR = (16 << 0) // PLL_M = 16 (HSI = 16 MHz input for PLL)

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@ -29,17 +29,18 @@ uint8_t drv_ads8688_spi_send_rev(uint8_t data)
bool drv_ads8688_Init(void)
{
uint8_t i = 0, value = 0;
drv_spi_init(kSpiDev_2, kSpiFreq_Div256, kSpiMode_C0E1, SpiFrame_MSBFirst, kGpioType_ADC_Clk, kGpioType_ADC_Miso, kGpioType_ADC_Mosi);
drv_spi_init(kSpiDev_2, kSpiFreq_Div64, kSpiMode_C1E1, SpiFrame_MSBFirst, kGpioType_ADC_Clk, kGpioType_ADC_Miso, kGpioType_ADC_Mosi);
drv_reset_ads8688();
OSTimeDly(20);
OSTimeDly(20);
drv_enter_standby_mode();
drv_enter_pwrdn_mode();
OSTimeDly(20);
//drv_enter_pwrdn_mode();
//OSTimeDly(20);
drv_set_ch_range(Channel_0_Input_Range,VREF_125_125);
OSTimeDly(20);
drv_set_ch_range(Channel_1_Input_Range,VREF_125_125);
drv_set_ch_range(Channel_2_Input_Range,VREF_125_125);
drv_set_ch_range(Channel_3_Input_Range,VREF_125_125);
@ -176,7 +177,7 @@ uint16_t drv_manual_chn_mode_Data(void)
datah = drv_ads8688_spi_send_rev(0xFF);
datal = drv_ads8688_spi_send_rev(0xFF);
drv_set_ads8688_cs(kGpioStatus_High);
kit_time_dly_ms(10);
return (datah << 8 | datal);
}