From bf00bc84f8aa48453b71d9d623d11ae51b93d6c4 Mon Sep 17 00:00:00 2001 From: ahu_gq Date: Wed, 12 Feb 2025 17:28:30 +0800 Subject: [PATCH] =?UTF-8?q?=E4=B8=B4=E6=97=B6=E4=B8=8A=E4=BC=A04g=EF=BC=8C?= =?UTF-8?q?=E5=AD=98=E6=A1=A3?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- app/stm32fxxx_app/app/gpio_manager.c | 11 +- app/stm32fxxx_app/app/gpio_manager.h | 3 + app/stm32fxxx_app/prj/BCU_APP.uvprojx | 139 +++++---------------- library/drv_peripheral/drv_eg25g.h | 0 library/drv_peripheral/drv_eg25gminipice.c | 84 +++++++++++++ library/drv_peripheral/drv_eg25gminipice.h | 26 ++++ 6 files changed, 149 insertions(+), 114 deletions(-) create mode 100644 library/drv_peripheral/drv_eg25g.h create mode 100644 library/drv_peripheral/drv_eg25gminipice.c create mode 100644 library/drv_peripheral/drv_eg25gminipice.h diff --git a/app/stm32fxxx_app/app/gpio_manager.c b/app/stm32fxxx_app/app/gpio_manager.c index 012f4e0..9a6f3e9 100644 --- a/app/stm32fxxx_app/app/gpio_manager.c +++ b/app/stm32fxxx_app/app/gpio_manager.c @@ -44,11 +44,14 @@ const GpioArray io_array[kGpioType_End] = kGpioMode_Comm_Rx, kGpioStatus_Low, GPIO_PORT_PIN(kGpioPort_A, 10), kGpioPort_A, kGpioPin_10 , //rs485C Rx(mcu uart1) kGpioMode_Comm_Tx, kGpioStatus_Low, GPIO_PORT_PIN(kGpioPort_A, 9), kGpioPort_A, kGpioPin_9 , //rs485C Tx(mcu uart1) - kGpioMode_Comm_Rx, kGpioStatus_Low, GPIO_PORT_PIN(kGpioPort_D, 9), kGpioPort_D, kGpioPin_9 , //rs485B Rx(mcu uart1) - kGpioMode_Comm_Tx, kGpioStatus_Low, GPIO_PORT_PIN(kGpioPort_D, 8), kGpioPort_D, kGpioPin_8 , //rs485B Tx(mcu uart1) + kGpioMode_Comm_Rx, kGpioStatus_Low, GPIO_PORT_PIN(kGpioPort_D, 9), kGpioPort_D, kGpioPin_9 , //rs485B Rx(mcu uart3) + kGpioMode_Comm_Tx, kGpioStatus_Low, GPIO_PORT_PIN(kGpioPort_D, 8), kGpioPort_D, kGpioPin_8 , //rs485B Tx(mcu uart3) - kGpioMode_Comm_Rx, kGpioStatus_Low, GPIO_PORT_PIN(kGpioPort_A, 1), kGpioPort_A, kGpioPin_1 , //rs485A Rx(mcu uart1) - kGpioMode_Comm_Tx, kGpioStatus_Low, GPIO_PORT_PIN(kGpioPort_A, 0), kGpioPort_A, kGpioPin_0 , //rs485A Tx(mcu uart1) + kGpioMode_Comm_Rx, kGpioStatus_Low, GPIO_PORT_PIN(kGpioPort_A, 1), kGpioPort_A, kGpioPin_1 , //rs485A Rx(mcu uart4) + kGpioMode_Comm_Tx, kGpioStatus_Low, GPIO_PORT_PIN(kGpioPort_A, 0), kGpioPort_A, kGpioPin_0 , //rs485A Tx(mcu uart4) + + kGpioMode_Comm_Rx, kGpioStatus_Low, GPIO_PORT_PIN(kGpioPort_A, 2), kGpioPort_A, kGpioPin_2 , //SIM UART Rx(mcu uart2) + kGpioMode_Comm_Tx, kGpioStatus_Low, GPIO_PORT_PIN(kGpioPort_A, 3), kGpioPort_A, kGpioPin_3 , //SIM UART Tx(mcu uart2) /*CAN枚举*/ kGpioMode_Comm_Rx, kGpioStatus_Low, GPIO_PORT_PIN(kGpioPort_A, 11), kGpioPort_A, kGpioPin_11 , //can1 rx diff --git a/app/stm32fxxx_app/app/gpio_manager.h b/app/stm32fxxx_app/app/gpio_manager.h index b620b00..7a9bce3 100644 --- a/app/stm32fxxx_app/app/gpio_manager.h +++ b/app/stm32fxxx_app/app/gpio_manager.h @@ -56,6 +56,9 @@ typedef enum kGpioType_Rs485_Ch2_Tx, kGpioType_Rs485_Ch3_Rx, kGpioType_Rs485_Ch3_Tx, + + kGpioType_SIMUart_Rx, //Sim卡 + kGpioType_SIMUart_Tx, //Sim卡 /*CAN枚举*/ kGpioType_Can_Ch1_Rx, diff --git a/app/stm32fxxx_app/prj/BCU_APP.uvprojx b/app/stm32fxxx_app/prj/BCU_APP.uvprojx index 6654ef5..fb759b2 100644 --- a/app/stm32fxxx_app/prj/BCU_APP.uvprojx +++ b/app/stm32fxxx_app/prj/BCU_APP.uvprojx @@ -10,15 +10,15 @@ stm32f407 0x4 ARM-ADS - 5060750::V5.06 update 6 (build 750)::ARMCC - 5060750::V5.06 update 6 (build 750)::ARMCC + 5060960::V5.06 update 7 (build 960)::.\ARMCC + 5060960::V5.06 update 7 (build 960)::.\ARMCC 0 STM32F407ZGTx STMicroelectronics - Keil.STM32F4xx_DFP.2.14.0 - http://www.keil.com/pack/ + Keil.STM32F4xx_DFP.3.0.0 + https://www.keil.com/pack/ IRAM(0x20000000,0x00020000) IRAM2(0x10000000,0x00010000) IROM(0x08000000,0x00100000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE @@ -186,6 +186,7 @@ 0 2 0 + 0 1 0 8 @@ -352,7 +353,7 @@ 0 0 0 - 0 + 4 @@ -471,7 +472,7 @@ 2 2 2 - 2 + 0 @@ -632,6 +633,11 @@ 1 ..\..\..\library\drv_peripheral\drv_w5500.c + + drv_eg25gminipice.c + 1 + ..\..\..\library\drv_peripheral\drv_eg25gminipice.c + @@ -641,57 +647,6 @@ main.c 1 ..\app\main.c - - - 2 - 0 - 0 - 0 - 0 - 1 - 2 - 2 - 2 - 2 - 11 - - - 1 - - - - 2 - 0 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 0 - 2 - 2 - 2 - 2 - 2 - 0 - 0 - 2 - 2 - 2 - 2 - 2 - - - - - - - - - task_register.c @@ -707,57 +662,6 @@ bmu_manager.c 1 ..\app\bmu_manager.c - - - 2 - 0 - 0 - 0 - 0 - 1 - 2 - 2 - 2 - 2 - 11 - - - 1 - - - - 2 - 0 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 2 - 0 - 2 - 2 - 2 - 2 - 2 - 0 - 0 - 2 - 2 - 2 - 2 - 2 - - - - - - - - - comm_manager.c @@ -972,7 +876,7 @@ 2 2 2 - 2 + 0 @@ -1312,6 +1216,7 @@ 0 2 0 + 0 1 0 8 @@ -1478,7 +1383,7 @@ 0 0 0 - 0 + 4 @@ -1689,6 +1594,11 @@ 1 ..\..\..\library\drv_peripheral\drv_w5500.c + + drv_eg25gminipice.c + 1 + ..\..\..\library\drv_peripheral\drv_eg25gminipice.c + @@ -2033,4 +1943,13 @@ + + + + BCU_APP + 1 + + + + diff --git a/library/drv_peripheral/drv_eg25g.h b/library/drv_peripheral/drv_eg25g.h new file mode 100644 index 0000000..e69de29 diff --git a/library/drv_peripheral/drv_eg25gminipice.c b/library/drv_peripheral/drv_eg25gminipice.c new file mode 100644 index 0000000..dce1f1a --- /dev/null +++ b/library/drv_peripheral/drv_eg25gminipice.c @@ -0,0 +1,84 @@ +/****************************************************************************** + * @file drv_eg25gminipice.c + * @brief drv_eg25gminipice.c drivers + * @version V1.0 + * @author Gary + * @copyright + ******************************************************************************/ + +#include "drv_eg25gminipice.h" + +#define UART2_BAUDRATE 115200 + +void drv_uart2_Init(void) +{ + RCC->APB1ENR |= RCC_APB1ENR_USART2EN; // ʹ USART2 ʱ + RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN; // ʹ GPIOA ʱ + + GPIOA->MODER |= (2 << (2 * 2)) | (2 << (3 * 2)); // PA2(TX), PA3(RX) ģʽ + GPIOA->AFR[0] |= (7 << (2 * 4)) | (7 << (3 * 4)); // AF7 (USART2) + + USART2->BRR = SystemCoreClock / UART2_BAUDRATE; + USART2->CR1 = USART_CR1_TE | USART_CR1_RE | USART_CR1_UE; // ʹܴڡͺͽ +} + +void drv_uart2_sendbyte(char c) +{ + while (!(USART2->SR & USART_SR_TXE)); // ȴ + USART2->DR = c; +} + +void drv_uart2_sendString(const char *str) +{ + while (*str) { + drv_uart2_sendbyte(*str++); + } +} + +void drv_send_at_cmd(const char *cmd, int delay_ms) +{ + drv_uart2_sendString(cmd); + drv_uart2_sendString("\r\n"); // AT ָ "\r\n" β + for (volatile int i = 0; i < delay_ms * 1000; i++); // ʱ +} + +void drv_eg25g_init(void) +{ + drv_send_at_cmd("AT", 500); + drv_send_at_cmd("AT+CPIN?", 500); + drv_send_at_cmd("AT+CREG?", 500); + drv_send_at_cmd("AT+CGATT=1", 500); + drv_send_at_cmd("AT+SAPBR=3,1,\"CONTYPE\",\"GPRS\"", 500); + drv_send_at_cmd("AT+SAPBR=3,1,\"APN\",\"your_apn\"", 500); + drv_send_at_cmd("AT+SAPBR=1,1", 2000); +} + +void drv_mqtt_connect(void) +{ + drv_send_at_cmd("AT+QMTCFG=\"recv/mode\",0,0,1", 500); + drv_send_at_cmd("AT+QMTOPEN=0,\"mqtt.example.com\",1883", 5000); + drv_send_at_cmd("AT+QMTCONN=0,\"client_id\",\"username\",\"password\"", 5000); +} + +void drv_mqtt_publish(const char *topic, const char *message) +{ + char cmd[128]; + sprintf(cmd, "AT+QMTPUB=0,0,0,0,\"%s\",\"%s\"", topic, message); + drv_send_at_cmd(cmd, 500); +} + +/* +int main(void) { + SystemInit(); + drv_uart2_Init(); + drv_eg25g_init(); + drv_mqtt_connect(); + + while (1) + { + drv_mqtt_publish("sensor/data", "{\"temperature\":25.3}"); + for (volatile int i = 0; i < 10000000; i++); // ͼ + } +} +*/ + diff --git a/library/drv_peripheral/drv_eg25gminipice.h b/library/drv_peripheral/drv_eg25gminipice.h new file mode 100644 index 0000000..2ce8bed --- /dev/null +++ b/library/drv_peripheral/drv_eg25gminipice.h @@ -0,0 +1,26 @@ +/****************************************************************************** + * @file drv_eg25gminipice.h + * @brief drv_eg25gminipice drivers + * @version V1.0 + * @author Gary + * @copyright + ******************************************************************************/ +#ifndef DRV_EG25GMINIPICE_H_ +#define DRV_EG25GMINIPICE_H_ + +#include "drv_gpio.h" +#include "stm32f4xx.h" +#include "bsp_task.h" + +#include "kit_time.h" +#include "kit_data.h" +#include "kit_debug.h" + +#include "ucos_ii.h" + + + + + + +#endif //DRV_EG25GMINIPICE_H_ \ No newline at end of file