Bluesun
/
BCU
forked from gary/BCU
2
0
Fork 0
Code Pull Requests Activity

同步

This commit is contained in:
ahu_gq 2025-03-08 13:55:30 +08:00
parent bc90218521
commit e4c7841a5a
4 changed files with 144 additions and 425807 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

425917
app/stm32fxxx_app/prj/JLinkLog.txt
View File

File diff suppressed because it is too large Load Diff

20
library/drv_peripheral/drv_ads8688.c
View File

@ -12,6 +12,7 @@
void drv_set_ads8688_cs(GpioStatus state) void drv_set_ads8688_cs(GpioStatus state)
{ {
drv_gpio_set_pin_status(kGpioType_ADC_Cs, state); drv_gpio_set_pin_status(kGpioType_ADC_Cs, state);
kit_time_dly_us(10);
} }
void drv_set_ads8688_rst(GpioStatus state) void drv_set_ads8688_rst(GpioStatus state)
@ -32,12 +33,18 @@ bool drv_ads8688_Init(void)
drv_spi_init(kSpiDev_2, kSpiFreq_Div256, kSpiMode_C0E1, SpiFrame_MSBFirst, kGpioType_ADC_Clk, kGpioType_ADC_Miso, kGpioType_ADC_Mosi); drv_spi_init(kSpiDev_2, kSpiFreq_Div256, kSpiMode_C0E1, SpiFrame_MSBFirst, kGpioType_ADC_Clk, kGpioType_ADC_Miso, kGpioType_ADC_Mosi);
//drv_ads8688_Reset();// hardware reset //drv_ads8688_Reset();// hardware reset
drv_enter_pwrdn_mode();
OSTimeDly(20);
drv_enter_standby_mode();
OSTimeDly(20);
drv_reset_ads8688(); drv_reset_ads8688();
OSTimeDly(20); kit_time_dly_ms(20);
drv_enter_standby_mode();
kit_time_dly_ms(20);
drv_enter_pwrdn_mode();
kit_time_dly_ms(20);
drv_ads8688_write_reg(Feature_Select, 0x28);
kit_time_dly_ms(20);
drv_set_ch_range(Channel_0_Input_Range,VREF_25_25); drv_set_ch_range(Channel_0_Input_Range,VREF_25_25);
drv_set_ch_range(Channel_1_Input_Range,VREF_25_25); drv_set_ch_range(Channel_1_Input_Range,VREF_25_25);
drv_set_ch_range(Channel_2_Input_Range,VREF_25_25); drv_set_ch_range(Channel_2_Input_Range,VREF_25_25);
@ -45,8 +52,7 @@ bool drv_ads8688_Init(void)
drv_set_ch_range(Channel_4_Input_Range,VREF_25_25); drv_set_ch_range(Channel_4_Input_Range,VREF_25_25);
drv_set_ch_range(Channel_5_Input_Range,VREF_25_25); drv_set_ch_range(Channel_5_Input_Range,VREF_25_25);
drv_set_ch_pwrdn(Channel_6_Input_Range); drv_set_ch_pwrdn(0xC0);
drv_set_ch_pwrdn(Channel_7_Input_Range);
drv_ads8688_write_reg(AUTO_SEQ_EN, 0x3F); drv_ads8688_write_reg(AUTO_SEQ_EN, 0x3F);

2
library/drv_peripheral/drv_eg25gminipice.c
View File

@ -85,6 +85,8 @@ int drv_send_at_cmd2(const char *cmd, int delay_ms)
if (sim_item.buf_pos > 0 && strstr((const char*)sim_item.buf, "OK")) // 解析返回值 if (sim_item.buf_pos > 0 && strstr((const char*)sim_item.buf, "OK")) // 解析返回值
{ {
sim_item.buf_pos = 0;
memset(sim_item.buf,0x00,MAX_RECV_LEN);
return 1; // 成功 return 1; // 成功
} }
} }

12
library/drv_peripheral/drv_w5500.c
View File

@ -24,19 +24,21 @@ void drv_w5500_init(W5500Item *item, uint32_t ip, uint16_t *port_array, uint32_t
uint32_t cnt = 0; uint32_t cnt = 0;
item->server_port = port_array; item->server_port = port_array;
//自动协商 最高位置位，否则PHY重启 //初始化检测网线是否连接
buf[0] = 0x38 | 0x80 | 0x40;
drv_w5500_write_comm_reg(item, W5500_PHYCFGR_REG_0x2E, buf, 1);
buf[0] = 0; buf[0] = 0;
while(((buf[0] & 0x01) == 0x00) && (cnt++ < 50)) while(((buf[0] & 0x01) == 0x00) && (cnt++ < 50))
{ {
bsp_task_delay_ms(100); bsp_task_delay_ms(100);
drv_w5500_read_comm_reg(item, W5500_PHYCFGR_REG_0x2E, buf, 1); drv_w5500_read_comm_reg(item, W5500_PHYCFGR_REG_0x2E, buf, 1);
} }
KIT_MODULE_PRINTF(W5500_PRT_EN, "w5500 connet res %d\r\n", cnt < 100); KIT_MODULE_PRINTF(W5500_PRT_EN, "w5500 connet res %d\r\n", cnt < 100);
cnt = 0; cnt = 0;
//自动协商 最高位置位，否则PHY重启
buf[0] = 0x38 | 0x80 | 0x40;
drv_w5500_write_comm_reg(item, W5500_PHYCFGR_REG_0x2E, buf, 1);
//设置网关IP 子网掩码 MAC 源IP //设置网关IP 子网掩码 MAC 源IP
WRITE_LT_INT32U(buf, cnt, gateway_ip); WRITE_LT_INT32U(buf, cnt, gateway_ip);
WRITE_LT_INT32U(buf, cnt, net_mask); WRITE_LT_INT32U(buf, cnt, net_mask);