81 lines
3.7 KiB
C
81 lines
3.7 KiB
C
/**
|
|
******************************************************************************
|
|
* @file stm32f10x_rcc.h
|
|
* @author MCD Application Team
|
|
* @version V3.5.0
|
|
* @date 11-March-2011
|
|
* @brief This file contains all the functions prototypes for the RCC firmware
|
|
* library.
|
|
******************************************************************************
|
|
* @attention
|
|
*
|
|
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
|
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
|
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
|
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
|
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
|
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
|
*
|
|
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
|
******************************************************************************
|
|
*/
|
|
#ifndef DRV_RCC_H_
|
|
#define DRV_RCC_H_
|
|
|
|
#ifdef __cplusplus
|
|
extern "C" {
|
|
#endif
|
|
|
|
#define RCC_AHB1Periph_GPIOA ((uint32_t)0x00000001)
|
|
#define RCC_AHB1Periph_GPIOB ((uint32_t)0x00000002)
|
|
#define RCC_AHB1Periph_GPIOC ((uint32_t)0x00000004)
|
|
#define RCC_AHB1Periph_GPIOD ((uint32_t)0x00000008)
|
|
#define RCC_AHB1Periph_GPIOE ((uint32_t)0x00000010)
|
|
#define RCC_AHB1Periph_GPIOF ((uint32_t)0x00000020)
|
|
#define RCC_AHB1Periph_GPIOG ((uint32_t)0x00000040)
|
|
#define RCC_AHB1Periph_GPIOH ((uint32_t)0x00000080)
|
|
#define RCC_AHB1Periph_GPIOI ((uint32_t)0x00000100)
|
|
#define RCC_AHB1Periph_GPIOJ ((uint32_t)0x00000200)
|
|
#define RCC_AHB1Periph_GPIOK ((uint32_t)0x00000400)
|
|
#define RCC_AHB1Periph_CRC ((uint32_t)0x00001000)
|
|
#define RCC_AHB1Periph_FLITF ((uint32_t)0x00008000)
|
|
#define RCC_AHB1Periph_SRAM1 ((uint32_t)0x00010000)
|
|
#define RCC_AHB1Periph_SRAM2 ((uint32_t)0x00020000)
|
|
#define RCC_AHB1Periph_BKPSRAM ((uint32_t)0x00040000)
|
|
#define RCC_AHB1Periph_SRAM3 ((uint32_t)0x00080000)
|
|
#define RCC_AHB1Periph_CCMDATARAMEN ((uint32_t)0x00100000)
|
|
#define RCC_AHB1Periph_DMA1 ((uint32_t)0x00200000)
|
|
#define RCC_AHB1Periph_DMA2 ((uint32_t)0x00400000)
|
|
#define RCC_AHB1Periph_DMA2D ((uint32_t)0x00800000)
|
|
#define RCC_AHB1Periph_ETH_MAC ((uint32_t)0x02000000)
|
|
#define RCC_AHB1Periph_ETH_MAC_Tx ((uint32_t)0x04000000)
|
|
#define RCC_AHB1Periph_ETH_MAC_Rx ((uint32_t)0x08000000)
|
|
#define RCC_AHB1Periph_ETH_MAC_PTP ((uint32_t)0x10000000)
|
|
#define RCC_AHB1Periph_OTG_HS ((uint32_t)0x20000000)
|
|
#define RCC_AHB1Periph_OTG_HS_ULPI ((uint32_t)0x40000000)
|
|
#define RCC_APB1Periph_PWR ((uint32_t)0x10000000)
|
|
|
|
#define RCC_APB1Periph_I2C1 ((uint32_t)0x00200000)
|
|
#define RCC_APB1Periph_I2C2 ((uint32_t)0x00400000)
|
|
#define RCC_APB1Periph_I2C3 ((uint32_t)0x00800000)
|
|
#define RCC_APB1Periph_CAN1 ((uint32_t)0x02000000)
|
|
#define RCC_APB1Periph_CAN2 ((uint32_t)0x04000000)
|
|
|
|
#define RCC_APB1Periph_SPI2 ((uint32_t)0x00004000)
|
|
#define RCC_APB1Periph_SPI3 ((uint32_t)0x00008000)
|
|
#define RCC_APB2Periph_SPI1 ((uint32_t)0x00001000)
|
|
|
|
#define RCC_APB2Periph_USART1 ((uint32_t)0x00000010)
|
|
#define RCC_APB1Periph_USART2 ((uint32_t)0x00020000)
|
|
#define RCC_APB1Periph_USART3 ((uint32_t)0x00040000)
|
|
#define RCC_APB1Periph_UART4 ((uint32_t)0x00080000)
|
|
#define RCC_APB1Periph_UART5 ((uint32_t)0x00100000)
|
|
#define RCC_APB2Periph_USART6 ((uint32_t)0x00000020)
|
|
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif
|