97 lines
3.4 KiB
C
97 lines
3.4 KiB
C
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/*
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*********************************************************************************************************
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* uC/CPU
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* CPU CONFIGURATION & PORT LAYER
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*
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* Copyright 2004-2021 Silicon Laboratories Inc. www.silabs.com
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*
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* SPDX-License-Identifier: APACHE-2.0
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*
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* This software is subject to an open source license and is distributed by
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* Silicon Laboratories Inc. pursuant to the terms of the Apache License,
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* Version 2.0 available at www.apache.org/licenses/LICENSE-2.0.
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*
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*********************************************************************************************************
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*/
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/*
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*********************************************************************************************************
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*
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* CPU PORT FILE
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*
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* Microblaze
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* GNU
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*
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* Filename : cpu_c.c
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* Version : V1.32.01
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*********************************************************************************************************
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*/
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/*
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*********************************************************************************************************
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* INCLUDE FILES
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*********************************************************************************************************
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*/
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#define MICRIUM_SOURCE
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#include <cpu.h>
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#include <cpu_core.h>
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#include <mb_interface.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*
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*********************************************************************************************************
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* LOCAL VARIABLES
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*********************************************************************************************************
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*/
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/*
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*********************************************************************************************************
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* CPU_FlushDCache()
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*
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* Description : Flush a specific range in the cache memory
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*
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* Argument(s) : addr the start address of the memory area to flush
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* len the size of the memory area to flush
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*
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* Return(s) : none.
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*
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* Note(s) : The function uses microblaze_flush_dcache_range() which is part of Xilinx libraries
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*********************************************************************************************************
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*/
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void CPU_CacheDataFlush (void *addr,
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CPU_INT32U len)
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{
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microblaze_flush_dcache_range((CPU_INT32S)addr, len);
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}
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/*
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*********************************************************************************************************
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* CPU_InvalidateDCache()
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*
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* Description : Invalide a specific range in the cache memory
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*
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* Argument(s) : addr the start address of the memory area to invalidate
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* len the size of the memory area to invalidate
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*
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* Return(s) : none.
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*
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* Note(s) : The function uses microblaze_invalidate_dcache_range() which is part of Xilinx libraries
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*********************************************************************************************************
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*/
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void CPU_CacheDataInvalidate (void *addr,
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CPU_INT32U len)
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{
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microblaze_invalidate_dcache_range((CPU_INT32S)addr, len);
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}
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#ifdef __cplusplus
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}
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#endif
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