2024-11-20 15:33:37 +08:00
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#ifndef __CAN_H
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#define __CAN_H
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2024-11-12 19:03:56 +08:00
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2024-11-20 17:07:14 +08:00
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#include "bsp_flash.h"
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2024-11-20 15:33:37 +08:00
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#include "bsp_can.h"
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#include "bsp_delay.h"
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2024-11-12 19:03:56 +08:00
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#include "drv_sys.h"
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2024-11-20 15:33:37 +08:00
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2024-11-12 19:03:56 +08:00
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/******************************************************************************************/
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/* CAN <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> */
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2024-11-20 15:33:37 +08:00
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#define CAN_RX_GPIO_PORT GPIOB
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#define CAN_RX_GPIO_PIN GPIO_PIN_12
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#define CAN_RX_GPIO_CLK_ENABLE() do{ __HAL_RCC_GPIOB_CLK_ENABLE(); }while(0) /* PA<50><41>ʱ<EFBFBD><CAB1>ʹ<EFBFBD><CAB9> */
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2024-11-12 19:03:56 +08:00
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2024-11-20 15:33:37 +08:00
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#define CAN_TX_GPIO_PORT GPIOB
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#define CAN_TX_GPIO_PIN GPIO_PIN_13
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#define CAN_TX_GPIO_CLK_ENABLE() do{ __HAL_RCC_GPIOB_CLK_ENABLE(); }while(0) /* PA<50><41>ʱ<EFBFBD><CAB1>ʹ<EFBFBD><CAB9> */
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2024-11-12 19:03:56 +08:00
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/******************************************************************************************/
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/* CAN<41><4E><EFBFBD><EFBFBD>RX0<58>ж<EFBFBD>ʹ<EFBFBD><CAB9> */
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#define CAN_RX0_INT_ENABLE 0 /* 0,<2C><>ʹ<EFBFBD><CAB9>; 1,ʹ<><CAB9>; */
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/* <20><><EFBFBD><EFBFBD><EFBFBD>ӿں<D3BF><DABA><EFBFBD> */
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uint8_t can_receive_msg(uint32_t id, uint8_t *buf); /* CAN<41><4E><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>, <20><>ѯ */
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uint8_t can_send_msg(uint32_t id, uint8_t *msg, uint8_t len); /* CAN<41><4E><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
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uint8_t can_init(uint32_t tsjw,uint32_t tbs2,uint32_t tbs1,uint16_t brp,uint32_t mode); /* CAN<41><4E>ʼ<EFBFBD><CABC> */
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#endif
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