103 lines
4.0 KiB
ArmAsm
103 lines
4.0 KiB
ArmAsm
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/*
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*********************************************************************************************************
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* uC/CPU
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* CPU CONFIGURATION & PORT LAYER
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*
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* Copyright 2004-2021 Silicon Laboratories Inc. www.silabs.com
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*
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* SPDX-License-Identifier: APACHE-2.0
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*
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* This software is subject to an open source license and is distributed by
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* Silicon Laboratories Inc. pursuant to the terms of the Apache License,
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* Version 2.0 available at www.apache.org/licenses/LICENSE-2.0.
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*
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*********************************************************************************************************
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*/
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/*
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*********************************************************************************************************
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*
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* CPU PORT FILE
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*
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* MIPS14k
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* MicroMips
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*
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* Filename : cpu_a.s
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* Version : V1.32.01
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*********************************************************************************************************
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*/
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#define _ASMLANGUAGE
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/*
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*********************************************************************************************************
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* PUBLIC FUNCTIONS
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*********************************************************************************************************
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*/
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.globl CPU_SR_Save
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.globl CPU_SR_Restore
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/*
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*********************************************************************************************************
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* EQUATES
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*********************************************************************************************************
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*/
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.text
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/*
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*********************************************************************************************************
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* DISABLE INTERRUPTS
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* CPU_SR CPU_SR_Save(void);
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*
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* Description: This function saves the state of the Status register and then disables interrupts via this
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* register. This objective is accomplished with a single instruction, di. The di
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* instruction's operand, $2, is the general purpose register to which the Status register's
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* value is saved. This value can be read by C functions that call OS_CPU_SR_Save().
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*
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* Arguments : None
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*
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* Returns : The previous state of the Status register
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*********************************************************************************************************
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*/
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.ent CPU_SR_Save
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CPU_SR_Save:
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jr $31
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di $2 /* Disable interrupts, and move the old value of the... */
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/* ...Status register into v0 ($2) */
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.end CPU_SR_Save
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/*
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*********************************************************************************************************
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* ENABLE INTERRUPTS
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* void CPU_SR_Restore(CPU_SR sr);
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*
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* Description: This function must be used in tandem with CPU_SR_Save(). Calling CPU_SR_Restore()
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* causes the value returned by CPU_SR_Save() to be placed in the Status register.
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*
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* Arguments : The value to be placed in the Status register
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*
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* Returns : None
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*********************************************************************************************************
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*/
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.ent CPU_SR_Restore
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CPU_SR_Restore:
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jr $31
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mtc0 $4, $12, 0 /* Restore the status register to its previous state */
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.end CPU_SR_Restore
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/*
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*********************************************************************************************************
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* CPU ASSEMBLY PORT FILE END
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*********************************************************************************************************
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*/
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