114 lines
4.3 KiB
ArmAsm
114 lines
4.3 KiB
ArmAsm
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#********************************************************************************************************
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#* uC/CPU
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#* CPU CONFIGURATION & PORT LAYER
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#*
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#* Copyright 2004-2021 Silicon Laboratories Inc. www.silabs.com
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#*
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#* SPDX-License-Identifier: APACHE-2.0
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#*
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#* This software is subject to an open source license and is distributed by
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#* Silicon Laboratories Inc. pursuant to the terms of the Apache License,
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#* Version 2.0 available at www.apache.org/licenses/LICENSE-2.0.
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#*
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#********************************************************************************************************
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#********************************************************************************************************
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#*
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#* CPU PORT FILE
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#*
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#* NXP MPC57xx-VLE
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#*
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#* Filename : cpu_a.s
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#* Version : V1.32.01
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#********************************************************************************************************
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#********************************************************************************************************
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#* ASM HEADER
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#********************************************************************************************************
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.text
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#********************************************************************************************************
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# PUBLIC DECLARATIONS
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#********************************************************************************************************
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.global CPU_SR_Save
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.global CPU_SR_Restore
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.global CPU_SR_Rd
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.global CPU_IntDis
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.global CPU_IntEn
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#********************************************************************************************************
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#* CRITICAL SECTION FUNCTIONS
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#*
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#* Description : These functions are used to enter and exit critical sections using Critical Method #3.
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#*
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#* CPU_SR CPU_SR_Save (void)
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#* Get current global interrupt mask bit value from MSR
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#* Disable interrupts
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#* Return global interrupt mask bit
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#*
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#* void CPU_SR_Restore (CPU_SR cpu_sr)
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#* Set global interrupt mask bit on MSR according to parameter cpu_sr
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#* Return
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#*
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#* Argument(s) : cpu_sr global interrupt mask status.
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#********************************************************************************************************
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CPU_SR_Save:
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mfmsr r3
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wrteei 0
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se_blr
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CPU_SR_Restore:
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wrtee r3
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se_blr
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#********************************************************************************************************
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#* READ STATUS REGISTER FUNCTION
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#*
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#* Description : This function is used to retrieve the status register value.
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#*
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#* CPU_SR CPU_SR_Rd (void)
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#* Get current MSR value
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#* Return
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#********************************************************************************************************
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CPU_SR_Rd:
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mfmsr r3
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se_blr
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#********************************************************************************************************
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#* DISABLE/ENABLE INTERRUPTS
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#*
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#* Description : Disable/Enable interrupts by setting or clearing the global interrupt mask in the cpu
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#* status register.
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#*
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#* void CPU_IntDis (void)
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#* Set global interrupt mask bit on MSR
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#* Return
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#*
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#* void CPU_IntEn (void)
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#* Clear global interrupt mask bit on MSR
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#* Return
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#********************************************************************************************************
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CPU_IntDis:
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wrteei 0
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se_blr
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CPU_IntEn:
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wrteei 1
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se_blr
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#********************************************************************************************************
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#* CPU ASSEMBLY PORT FILE END
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#********************************************************************************************************
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.end
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