258 lines
7.2 KiB
C
258 lines
7.2 KiB
C
/*
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*********************************************************************************************************
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* uC/CPU
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* CPU CONFIGURATION & PORT LAYER
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*
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* Copyright 2004-2021 Silicon Laboratories Inc. www.silabs.com
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*
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* SPDX-License-Identifier: APACHE-2.0
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*
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* This software is subject to an open source license and is distributed by
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* Silicon Laboratories Inc. pursuant to the terms of the Apache License,
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* Version 2.0 available at www.apache.org/licenses/LICENSE-2.0.
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*
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*********************************************************************************************************
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*/
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/*
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*********************************************************************************************************
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*
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* CPU PORT FILE
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*
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* TI C28x
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* TI C/C++ Compiler
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*
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*
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* Filename : cpu_c.c
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* Version : V1.32.01
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*********************************************************************************************************
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*/
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/*
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*********************************************************************************************************
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* INCLUDE FILES
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*********************************************************************************************************
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*/
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#include <cpu.h>
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#include <cpu_core.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*
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*********************************************************************************************************
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* LOCAL DEFINES
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*********************************************************************************************************
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*/
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/*
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*********************************************************************************************************
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* LOCAL CONSTANTS
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*********************************************************************************************************
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*/
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/*
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*********************************************************************************************************
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* LOCAL DATA TYPES
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*********************************************************************************************************
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*/
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/*
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*********************************************************************************************************
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* LOCAL TABLES
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*********************************************************************************************************
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*/
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/*
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*********************************************************************************************************
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* LOCAL GLOBAL VARIABLES
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*********************************************************************************************************
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*/
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/*
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*********************************************************************************************************
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* LOCAL FUNCTION PROTOTYPES
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*********************************************************************************************************
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*/
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/*
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*********************************************************************************************************
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* LOCAL CONFIGURATION ERRORS
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*********************************************************************************************************
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*/
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/*
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*********************************************************************************************************
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* CPU_IntSrcDis()
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*
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* Description : Disable an interrupt source.
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*
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* Argument(s) : int_id Interrupt source in interrupt enable register.
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*
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* Return(s) : none.
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*
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* Note(s) : (1) The RESET interrupt cannot be disabled.
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*********************************************************************************************************
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*/
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void CPU_IntSrcDis (CPU_DATA bit)
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{
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CPU_SR_ALLOC();
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if (bit <= CPU_INT_RTOSINT) {
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CPU_CRITICAL_ENTER();
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IER = IER & ~(1u << (bit-1));
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CPU_CRITICAL_EXIT();
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}
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}
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/*
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*********************************************************************************************************
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* CPU_IntSrcEn()
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*
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* Description : Enable an interrupt source.
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*
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* Argument(s) : int_id Interrupt source in interrupt enable register.
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*
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* Return(s) : none.
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*
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* Note(s) : none.
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*********************************************************************************************************
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*/
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void CPU_IntSrcEn (CPU_DATA bit)
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{
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CPU_SR_ALLOC();
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if (bit <= CPU_INT_RTOSINT) {
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CPU_CRITICAL_ENTER();
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IER = IER | (1u << (bit-1));
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CPU_CRITICAL_EXIT();
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}
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}
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/*
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*********************************************************************************************************
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* CPU_IntSrcPendClr()
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*
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* Description : Clear a pending interrupt.
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*
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* Argument(s) : bit Bit of interrupt source in interrupt enable register (see 'CPU_IntSrcDis()').
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*
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* Return(s) : none.
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*
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* Note(s) : none.
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*********************************************************************************************************
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*/
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void CPU_IntSrcPendClr (CPU_DATA bit)
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{
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/* The 'AND IFR' instruction cannot be used with ... */
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/* ... anything else than a 16bit constant. */
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switch (bit) {
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case CPU_INT_RTOSINT:
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asm(" AND IFR, #0x7FFF");
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break;
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case CPU_INT_DLOGINT:
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asm(" AND IFR, #0xBFFF");
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break;
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case CPU_INT_INT14:
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asm(" AND IFR, #0xDFFF");
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break;
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case CPU_INT_INT13:
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asm(" AND IFR, #0xEFFF");
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break;
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case CPU_INT_INT12:
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asm(" AND IFR, #0xF7FF");
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break;
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case CPU_INT_INT11:
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asm(" AND IFR, #0xFBFF");
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break;
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case CPU_INT_INT10:
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asm(" AND IFR, #0xFDFF");
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break;
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case CPU_INT_INT9:
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asm(" AND IFR, #0xFEFF");
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break;
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case CPU_INT_INT8:
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asm(" AND IFR, #0xFF7F");
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break;
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case CPU_INT_INT7:
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asm(" AND IFR, #0xFFBF");
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break;
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case CPU_INT_INT6:
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asm(" AND IFR, #0xFFDF");
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break;
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case CPU_INT_INT5:
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asm(" AND IFR, #0xFFEF");
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break;
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case CPU_INT_INT4:
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asm(" AND IFR, #0xFFF7");
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break;
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case CPU_INT_INT3:
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asm(" AND IFR, #0xFFFB");
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break;
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case CPU_INT_INT2:
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asm(" AND IFR, #0xFFFD");
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break;
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case CPU_INT_INT1:
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asm(" AND IFR, #0xFFFE");
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break;
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default: /* 'default' case intentionally empty. */
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break;
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}
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}
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#ifdef __cplusplus
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}
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#endif
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