377 lines
20 KiB
NASM
377 lines
20 KiB
NASM
;********************************************************************************************************
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; uC/CPU
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; CPU CONFIGURATION & PORT LAYER
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;
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; Copyright 2004-2021 Silicon Laboratories Inc. www.silabs.com
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;
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; SPDX-License-Identifier: APACHE-2.0
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;
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; This software is subject to an open source license and is distributed by
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; Silicon Laboratories Inc. pursuant to the terms of the Apache License,
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; Version 2.0 available at www.apache.org/licenses/LICENSE-2.0.
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;
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;********************************************************************************************************
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;********************************************************************************************************
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;
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; CPU PORT FILE
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;
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; TEMPLATE
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;
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; $$$$ Insert CPU Name
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; $$$$ Insert Compiler Name
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;
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; Filename : cpu_a.asm $$$$ Insert CPU assembly port file name
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; Version : V1.32.01 $$$$ Insert CPU assembly port file version number
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;********************************************************************************************************
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; Note(s) : (1) To provide the required CPU port functionality, insert the appropriate CPU- &/or
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; compiler-specific code to perform the stated actions wherever '$$$$' comments are
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; found.
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;
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; #### This note MAY be entirely removed for specific CPU port files.
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;********************************************************************************************************
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;********************************************************************************************************
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; PUBLIC FUNCTIONS
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;********************************************************************************************************
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; $$$$ Extern required CPU port functions :
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PUBLIC CPU_IntDis
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PUBLIC CPU_IntEn
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PUBLIC CPU_SR_Push
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PUBLIC CPU_SR_Pop
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PUBLIC CPU_SR_Save
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PUBLIC CPU_SR_Restore
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PUBLIC CPU_CntLeadZeros
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PUBLIC CPU_CntTrailZeros
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PUBLIC CPU_RevBits
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;********************************************************************************************************
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; EQUATES
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;********************************************************************************************************
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; $$$$ Define possible required CPU equates :
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;********************************************************************************************************
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; CODE GENERATION DIRECTIVES
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;********************************************************************************************************
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; $$$$ Insert possible required CPU-compiler code generation directives :
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;********************************************************************************************************
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; DISABLE/ENABLE INTERRUPTS
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;
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; Description : Disable/Enable interrupts.
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;
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; (1) (a) For CPU_CRITICAL_METHOD_INT_DIS_EN, interrupts are enabled/disabled WITHOUT saving
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; or restoring the state of the interrupt status.
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;
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;
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; Prototypes : void CPU_IntDis(void);
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; void CPU_IntEn (void);
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;********************************************************************************************************
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CPU_IntDis
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; $$$$ Insert code to disable CPU interrupts
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CPU_IntEn
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; $$$$ Insert code to enable CPU interrupts
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;********************************************************************************************************
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; PUSH/POP CPU STATUS REGISTER
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;
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; Description : Push/Pop the state of CPU interrupts onto the local stack, if possible.
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;
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; (1) (b) For CPU_CRITICAL_METHOD_STATUS_STK, the state of the interrupt status flag is
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; stored in onto the local stack & interrupts are then disabled. The previous
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; interrupt status state is restored from the local stack into the CPU's status
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; register.
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;
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;
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; Prototypes : void CPU_SR_Push(void);
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; void CPU_SR_Pop (void);
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;********************************************************************************************************
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CPU_SR_Push
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; $$$$ Insert code to push CPU status onto local stack & disable interrupts
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CPU_SR_Pop
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; $$$$ Insert code to pop CPU status from local stack
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;********************************************************************************************************
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; SAVE/RESTORE CPU STATUS REGISTER
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;
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; Description : Save/Restore the state of CPU interrupts, if possible.
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;
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; (1) (c) For CPU_CRITICAL_METHOD_STATUS_LOCAL, the state of the interrupt status flag is
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; stored in the local variable 'cpu_sr' & interrupts are then disabled ('cpu_sr' is
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; allocated in all functions that need to disable interrupts). The previous interrupt
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; status state is restored by copying 'cpu_sr' into the CPU's status register.
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;
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;
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; Prototypes : CPU_SR CPU_SR_Save (void);
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; void CPU_SR_Restore(CPU_SR cpu_sr);
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;
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; Note(s) : (1) These functions are used in general like this :
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;
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; void Task (void *p_arg)
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; {
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; CPU_SR_ALLOC(); /* Allocate storage for CPU status register */
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; :
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; :
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; CPU_CRITICAL_ENTER(); /* cpu_sr = CPU_SR_Save(); */
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; :
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; :
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; CPU_CRITICAL_EXIT(); /* CPU_SR_Restore(cpu_sr); */
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; :
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; }
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;********************************************************************************************************
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CPU_SR_Save
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; $$$$ Insert code to save CPU status register(s) & disable interrupts
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CPU_SR_Restore
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; $$$$ Insert code to restore CPU status register(s)
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;********************************************************************************************************
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; CPU_CntLeadZeros()
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; COUNT LEADING ZEROS
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;
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; Description : Counts the number of contiguous, most-significant, leading zero bits before the
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; first binary one bit in a data value.
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;
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; Prototype : CPU_DATA CPU_CntLeadZeros(CPU_DATA val);
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;
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; Argument(s) : val Data value to count leading zero bits.
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;
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; Return(s) : Number of contiguous, most-significant, leading zero bits in 'val'.
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;
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; Note(s) : (1) (a) Supports up to the following data value sizes, depending on the configured
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; size of 'CPU_DATA' (see 'cpu.h CPU WORD CONFIGURATION Note #1') :
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;
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; (1) 8-bits
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; (2) 16-bits
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; (3) 32-bits
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; (4) 64-bits
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;
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; (b) (1) For 8-bit values :
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;
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; b07 b06 b05 b04 b03 b02 b01 b00 # Leading Zeros
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; --- --- --- --- --- --- --- --- ---------------
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; 1 x x x x x x x 0
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; 0 1 x x x x x x 1
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; 0 0 1 x x x x x 2
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; 0 0 0 1 x x x x 3
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; 0 0 0 0 1 x x x 4
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; 0 0 0 0 0 1 x x 5
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; 0 0 0 0 0 0 1 x 6
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; 0 0 0 0 0 0 0 1 7
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; 0 0 0 0 0 0 0 0 8
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;
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;
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; (2) For 16-bit values :
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;
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; b15 b14 b13 ... b04 b03 b02 b01 b00 # Leading Zeros
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; --- --- --- --- --- --- --- --- ---------------
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; 1 x x x x x x x 0
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; 0 1 x x x x x x 1
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; 0 0 1 x x x x x 2
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; : : : : : : : : :
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; : : : : : : : : :
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; 0 0 0 1 x x x x 11
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; 0 0 0 0 1 x x x 12
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; 0 0 0 0 0 1 x x 13
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; 0 0 0 0 0 0 1 x 14
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; 0 0 0 0 0 0 0 1 15
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; 0 0 0 0 0 0 0 0 16
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;
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;
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; (3) For 32-bit values :
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;
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; b31 b30 b29 ... b04 b03 b02 b01 b00 # Leading Zeros
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; --- --- --- --- --- --- --- --- ---------------
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; 1 x x x x x x x 0
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; 0 1 x x x x x x 1
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; 0 0 1 x x x x x 2
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; : : : : : : : : :
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; : : : : : : : : :
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; 0 0 0 1 x x x x 27
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; 0 0 0 0 1 x x x 28
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; 0 0 0 0 0 1 x x 29
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; 0 0 0 0 0 0 1 x 30
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; 0 0 0 0 0 0 0 1 31
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; 0 0 0 0 0 0 0 0 32
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;
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;
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; (4) For 64-bit values :
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;
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; b63 b62 b61 ... b04 b03 b02 b01 b00 # Leading Zeros
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; --- --- --- --- --- --- --- --- ---------------
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; 1 x x x x x x x 0
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; 0 1 x x x x x x 1
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; 0 0 1 x x x x x 2
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; : : : : : : : : :
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; : : : : : : : : :
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; 0 0 0 1 x x x x 59
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; 0 0 0 0 1 x x x 60
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; 0 0 0 0 0 1 x x 61
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; 0 0 0 0 0 0 1 x 62
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; 0 0 0 0 0 0 0 1 63
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; 0 0 0 0 0 0 0 0 64
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;
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; (2) MUST be defined in 'cpu_a.asm' (or 'cpu_c.c') if CPU_CFG_LEAD_ZEROS_ASM_PRESENT
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; is #define'd in 'cpu_cfg.h' or 'cpu.h'.
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;********************************************************************************************************
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CPU_CntLeadZeros
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; $$$$ Insert code to count the number of contiguous, most-significant, ...
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; ... leading zero bits in 'val' (see Note #1b)
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;********************************************************************************************************
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; CPU_CntTrailZeros()
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; COUNT TRAILING ZEROS
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;
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; Description : Counts the number of contiguous, least-significant, trailing zero bits before the
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; first binary one bit in a data value.
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;
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; Prototype : CPU_DATA CPU_CntTrailZeros(CPU_DATA val);
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;
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; Argument(s) : val Data value to count trailing zero bits.
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;
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; Return(s) : Number of contiguous, least-significant, trailing zero bits in 'val'.
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;
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; Note(s) : (1) (a) Supports up to the following data value sizes, depending on the configured
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; size of 'CPU_DATA' (see 'cpu.h CPU WORD CONFIGURATION Note #1') :
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;
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; (1) 8-bits
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; (2) 16-bits
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; (3) 32-bits
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; (4) 64-bits
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;
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; (b) (1) For 8-bit values :
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;
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; b07 b06 b05 b04 b03 b02 b01 b00 # Trailing Zeros
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; --- --- --- --- --- --- --- --- ----------------
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; x x x x x x x 1 0
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; x x x x x x 1 0 1
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; x x x x x 1 0 0 2
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; x x x x 1 0 0 0 3
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; x x x 1 0 0 0 0 4
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; x x 1 0 0 0 0 0 5
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; x 1 0 0 0 0 0 0 6
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; 1 0 0 0 0 0 0 0 7
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; 0 0 0 0 0 0 0 0 8
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;
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;
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; (2) For 16-bit values :
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;
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; b15 b14 b13 b12 b11 ... b02 b01 b00 # Trailing Zeros
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; --- --- --- --- --- --- --- --- ----------------
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; x x x x x x x 1 0
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; x x x x x x 1 0 1
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; x x x x x 1 0 0 2
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; : : : : : : : : :
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; : : : : : : : : :
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; x x x x 1 0 0 0 11
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; x x x 1 0 0 0 0 12
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; x x 1 0 0 0 0 0 13
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; x 1 0 0 0 0 0 0 14
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; 1 0 0 0 0 0 0 0 15
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; 0 0 0 0 0 0 0 0 16
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;
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;
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; (3) For 32-bit values :
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;
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; b31 b30 b29 b28 b27 ... b02 b01 b00 # Trailing Zeros
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; --- --- --- --- --- --- --- --- ----------------
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; x x x x x x x 1 0
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; x x x x x x 1 0 1
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; x x x x x 1 0 0 2
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; : : : : : : : : :
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; : : : : : : : : :
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; x x x x 1 0 0 0 27
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; x x x 1 0 0 0 0 28
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; x x 1 0 0 0 0 0 29
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; x 1 0 0 0 0 0 0 30
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; 1 0 0 0 0 0 0 0 31
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; 0 0 0 0 0 0 0 0 32
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;
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;
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; (4) For 64-bit values :
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;
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; b63 b62 b61 b60 b59 ... b02 b01 b00 # Trailing Zeros
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; --- --- --- --- --- --- --- --- ----------------
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; x x x x x x x 1 0
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; x x x x x x 1 0 1
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; x x x x x 1 0 0 2
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; : : : : : : : : :
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; : : : : : : : : :
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; x x x x 1 0 0 0 59
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; x x x 1 0 0 0 0 60
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; x x 1 0 0 0 0 0 61
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; x 1 0 0 0 0 0 0 62
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; 1 0 0 0 0 0 0 0 63
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; 0 0 0 0 0 0 0 0 64
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;
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; (2) MUST be defined in 'cpu_a.asm' (or 'cpu_c.c') if CPU_CFG_TRAIL_ZEROS_ASM_PRESENT
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; is #define'd in 'cpu_cfg.h' or 'cpu.h'.
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;********************************************************************************************************
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CPU_CntTrailZeros
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; $$$$ Insert code to count the number of contiguous, least-significant, ...
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; ... trailing zero bits in 'val' (see Note #1b)
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;********************************************************************************************************
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; CPU_RevBits()
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; REVERSE BITS
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;
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; Description : Reverses the bits in a data value.
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;
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; Prototypes : CPU_DATA CPU_RevBits(CPU_DATA val);
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;
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; Argument(s) : val Data value to reverse bits.
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;
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; Return(s) : Value with all bits in 'val' reversed (see Note #1).
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;
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; Note(s) : (1) The final, reversed data value for 'val' is such that :
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;
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; 'val's final bit 0 = 'val's original bit N
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; 'val's final bit 1 = 'val's original bit (N - 1)
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; 'val's final bit 2 = 'val's original bit (N - 2)
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;
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; ... ...
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;
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; 'val's final bit (N - 2) = 'val's original bit 2
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; 'val's final bit (N - 1) = 'val's original bit 1
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; 'val's final bit N = 'val's original bit 0
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;********************************************************************************************************
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CPU_RevBits
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; $$$$ Insert code to reverse the bits in 'val' (see Note #1)
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;********************************************************************************************************
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; CPU ASSEMBLY PORT FILE END
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;********************************************************************************************************
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; $$$$ Insert assembly end-of-file directive, if any
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