116 lines
3.5 KiB
C
116 lines
3.5 KiB
C
#include "drv_adc.h"
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#include "drv_clk.h"
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#include "drv_dma.h"
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#include "kit_data.h"
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#include "kit_debug.h"
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#define CR1_SCAN_Set ((uint32_t)0x00000100)
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#define CR2_DMA_Set ((uint32_t)0x00000100)
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#define CR2_RSTCAL_Set ((uint32_t)0x00000008)
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#define CR2_CAL_Set ((uint32_t)0x00000004)
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#define CR2_SWSTART_Set ((uint32_t)0x00500000)
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#define CR2_CONT_Set ((uint32_t)0x00000002)
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#define CR2_ADON_Set ((uint32_t)0x00000001)
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#define CFGR_ADCPRE_Reset_Mask ((uint32_t)0xFFFF3FFF)
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#define RCC_PCLK2_Div8 ((uint32_t)0x0000C000)
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#define SMPR_SMP_Set ((uint32_t)0x00000007)
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#define SQR_SQ_Set ((uint32_t)0x0000001F)
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#define ADC_ExternalTrigConv_None ((uint32_t)0x000E0000) /*!< For ADC1, ADC2 and ADC3 */
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typedef struct
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{
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DmaStream dma_stream;
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DmaChannel dma_channel;
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ADC_TypeDef* reg;
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}STM32AdcProp;
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STM32AdcProp stm32_adc_prop[kAdcDev_End] =
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{
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{kDma2Stream_0, kDmaChannel_0, ADC1},
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{kDma2Stream_3, kDmaChannel_1, ADC2},
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{kDma2Stream_0, kDmaChannel_2, ADC3},
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};
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typedef struct
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{
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uint16_t arr_len;
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uint16_t sample_cnt;
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uint16_t *dma_buf;
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}AdcItem;
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AdcItem adc1_item;
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uint8_t drv_adc_init(AdcDev dev, const AdcArray *adc_arr, uint16_t len, uint16_t* dma_buf, uint8_t sample_cnt)
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{
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uint8_t tmp1_8u, tmp2_8u;
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uint32_t i;
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__IO uint32_t *sqr[3];
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__IO uint32_t *smpr[2];
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ADC_TypeDef *reg;
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if(dev < kAdcDev_End)
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{
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adc1_item.arr_len = len;
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adc1_item.dma_buf = dma_buf;
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adc1_item.sample_cnt = sample_cnt;
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reg = stm32_adc_prop[dev].reg;
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//dma init
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drv_dma_init(stm32_adc_prop[dev].dma_stream, stm32_adc_prop[dev].dma_channel, DMA_CFG_DATA_DIR_P2M | DMA_CFG_CYCLE_EXE | DMA_CFG_DATA_M_I|DMA_CFG_DATA_P_N|DMA_CFG_DATA_LEN_2B, (uint32_t)®->DR);
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drv_dma_set_buf(stm32_adc_prop[dev].dma_stream, (uint8_t*)dma_buf, len * sample_cnt);
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RCC->APB2ENR |= (RCC_APB2ENR_ADC1EN << dev); //开启时钟
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//设置ADC通道的转换顺序和采样时间
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sqr[0] = ®->SQR3;
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sqr[1] = ®->SQR2;
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sqr[2] = ®->SQR1;
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smpr[0] = ®->SMPR2;
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smpr[1] = ®->SMPR1;
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for(i = 0; i < len ; i++)
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{
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tmp1_8u = adc_arr[i].channel / 10;
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tmp2_8u = adc_arr[i].channel % 10 * 3;
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*smpr[tmp1_8u] &= ~(SMPR_SMP_Set << tmp2_8u);
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*smpr[tmp1_8u] |= (adc_arr[i].cycle << tmp2_8u);
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tmp1_8u = i / 6;
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tmp2_8u = i % 6 * 5;
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*sqr[tmp1_8u] &= ~(SQR_SQ_Set << tmp2_8u);
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*sqr[tmp1_8u] |= (adc_arr[i].channel << tmp2_8u);
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}
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//设置规则通道数目
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reg->SQR1 &= ~KIT_CREAT_BITS(20, 23);
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reg->SQR1 |= (uint32_t)(len - 1 ) << 20;
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KIT_CLR_BIT(reg->SR, 5);
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//设置ADC频率
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reg->CR1 |= ADC_CR1_SCAN;
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ADC->CCR |= 0x30000; //PCLK2 8分频
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//calibration
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reg->CR2 |= ADC_CR2_ADON | ADC_CR2_CONT | ADC_CR2_DDS | ADC_CR2_DMA;
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reg->CR2 |= ADC_CR2_SWSTART;
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}
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return true;
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}
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bool drv_adc_is_overflow(AdcDev dev)
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{
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return ((stm32_adc_prop[dev].reg->SR & 0x20) != 0);
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}
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uint16_t drv_adc_get_data(uint8_t idx)
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{
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uint16_t res = 0;
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KIT_ASSERT_PARAM(idx < adc1_item.arr_len);
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if(idx < adc1_item.arr_len)
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{
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res = kit_get_dma_avg_filter_min_max(adc1_item.dma_buf, adc1_item.arr_len, idx, adc1_item.sample_cnt);
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}
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return res;
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}
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