80 lines
3.6 KiB
ArmAsm
80 lines
3.6 KiB
ArmAsm
;********************************************************************************************************
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; uC/CPU
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; CPU CONFIGURATION & PORT LAYER
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;
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; Copyright 2004-2021 Silicon Laboratories Inc. www.silabs.com
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;
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; SPDX-License-Identifier: APACHE-2.0
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;
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; This software is subject to an open source license and is distributed by
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; Silicon Laboratories Inc. pursuant to the terms of the Apache License,
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; Version 2.0 available at www.apache.org/licenses/LICENSE-2.0.
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;
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;********************************************************************************************************
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;********************************************************************************************************
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;
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; CPU PORT FILE
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;
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; MCF5272
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; GNU C Compiler
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;
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; Filename : cpu_a.s
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; Version : V1.32.01
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;********************************************************************************************************
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;********************************************************************************************************
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; PUBLIC DECLARATIONS
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;********************************************************************************************************
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.global CPU_SR_Save
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.global CPU_SR_Restore
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;********************************************************************************************************
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; CPU_SR_Save() for OS_CRITICAL_METHOD #3
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;
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; Description : This functions implements the OS_CRITICAL_METHOD #3 function to preserve the state of the
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; interrupt disable flag in order to be able to restore it later.
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;
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; Arguments : none
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;
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; Returns : It is assumed that the return value is placed in the D0 register as expected by the
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; compiler.
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;********************************************************************************************************
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.text
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CPU_SR_Save:
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MOVE %SR,%D0 /* Copy SR into D0 */
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MOVE.L %D0,-(%A7) /* Save D0 */
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ORI.L #0x0700,%D0 /* Disable interrupts */
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MOVE %D0,%SR
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MOVE.L (%A7)+,%D0 /* Restore original state of SR */
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RTS
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;********************************************************************************************************
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; CPU_SR_Restore() for OS_CRITICAL_METHOD #3
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;
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; Description : This functions implements the OS_CRITICAL_METHOD #function to restore the state of the
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; interrupt flag.
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;
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; Arguments : cpu_sr is the contents of the SR to restore. It is assumed that this 'argument' is
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; passed in the D0 register of the CPU by the compiler.
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;
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; Returns : None
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;********************************************************************************************************
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CPU_SR_Restore:
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MOVE %D0,%SR
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RTS
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;********************************************************************************************************
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; CPU ASSEMBLY PORT FILE END
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;********************************************************************************************************
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END
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