/******************************************************************************
 * @file      drv_adbms1818.c
 * @brief     ads8688 drivers
 * @version   V1.0
 * @author    Gary
 * @copyright
 ******************************************************************************/
#include "drv_ads8688.h"
#include "drv_spi.h"
#include "kit_time.h"

void drv_set_ads8688_cs(GpioStatus state)
{
	drv_gpio_set_pin_status(kGpioType_ADC_Cs, state);
	kit_time_dly_us(10);
}

void drv_set_ads8688_rst(GpioStatus state)
{
	drv_gpio_set_pin_status(kGpioType_ADC_Reset, state);
}

uint8_t drv_ads8688_spi_send_rev(uint8_t data)
{
	return drv_spi_sync_send_rev(kSpiDev_2, data);
}

// ��ʼ��ADS8688�����Ҽ������Ĵ������ݺ�д����Ƿ�һ��
// ����TURE��˵����ʼ���������������
bool drv_ads8688_Init(void)
{
	uint8_t i = 0, value = 0;
	drv_spi_init(kSpiDev_2, kSpiFreq_Div256, kSpiMode_C0E1, SpiFrame_MSBFirst, kGpioType_ADC_Clk, kGpioType_ADC_Miso, kGpioType_ADC_Mosi);
	// drv_ads8688_Reset();// hardware reset

	drv_reset_ads8688();
	kit_time_dly_ms(20);

	drv_enter_standby_mode();
	kit_time_dly_ms(20);

	drv_enter_pwrdn_mode();
	kit_time_dly_ms(20);

	drv_ads8688_write_reg(Feature_Select, 0x28);
	kit_time_dly_ms(20);

	drv_set_ch_range(Channel_0_Input_Range, VREF_25_25);
	drv_set_ch_range(Channel_1_Input_Range, VREF_25_25);
	drv_set_ch_range(Channel_2_Input_Range, VREF_25_25);
	drv_set_ch_range(Channel_3_Input_Range, VREF_25_25);
	drv_set_ch_range(Channel_4_Input_Range, VREF_25_25);
	drv_set_ch_range(Channel_5_Input_Range, VREF_25_25);

	drv_set_ch_pwrdn(0xC0);

	// value = drv_ads8688_read_reg(Channel_0_Input_Range);

	drv_set_ch_pwrdn(0xC0);

	//

#if ADC_AUTO_MODE
	{
		drv_ads8688_write_reg(AUTO_SEQ_EN, 0x3F);
		i = drv_ads8688_read_reg(AUTO_SEQ_EN);

		if (i != 0x3F)
		{
			return true;
		}
		else
		{
			drv_enter_auto_rst_mode(); // �����Զ�ɨ��ģʽ
			OSTimeDly(20);
			return false;
		}
	}
#else
	{
		drv_manual_chn_mode(MAN_Ch_0);
		drv_manual_chn_mode(MAN_Ch_1);
		drv_manual_chn_mode(MAN_Ch_2);
		drv_manual_chn_mode(MAN_Ch_3);
		drv_manual_chn_mode(MAN_Ch_4);
		drv_manual_chn_mode(MAN_Ch_5);
		return false;
	}

#endif
}

void drv_ads8688_Reset(void) // hardware reset
{
	uint8_t i = 5;
	drv_set_ads8688_rst(kGpioStatus_Low);
	OSTimeDly(10);
	while (i--)
		;
	drv_set_ads8688_rst(kGpioStatus_High);
}

void drv_ads8688_pwrdn(void) // hardware power-down
{
	uint8_t i = 50;
	drv_set_ads8688_rst(kGpioStatus_Low);
	while (i--)
		;
}

void drv_ads8688_pwrup(void) // power-down
{
	drv_set_ads8688_rst(kGpioStatus_High);
}

void drv_ads8688_write_cmd_reg(uint16_t command) // дADS8688����Ĵ���
{
	drv_set_ads8688_cs(kGpioStatus_Low);
	drv_ads8688_spi_send_rev(command >> 8 & 0xFF);
	drv_ads8688_spi_send_rev(command & 0xFF);
	drv_set_ads8688_cs(kGpioStatus_High);
}

void drv_reset_ads8688(void) // ������λģʽ����λ program registers
{
	drv_ads8688_write_cmd_reg(RST);
}

// ����STDBYģʽ��������ͺ�CS�����øߣ���������֡��
// �˳���ģʽ��ִ��AUTO_RST����MAN_CH_n�������Ҫ�ȴ�����20us�Ա�֤�������ݵ�ADת��
void drv_enter_standby_mode(void)
{
	// drv_ads8688_write_cmd_reg(STDBY);
	drv_ads8688_write_cmd_reg(NO_OP);
}

// ����PWR_DNģʽ��������ͺ�CS�����øߣ���������֡��
// �˳���ģʽ��ִ��AUTO_RST����MAN_CH_n�������Ҫ�ȴ�����15ms�Ա�֤�������ݵ�ADת��
void drv_enter_pwrdn_mode(void) // ��Ϊ������ʽ����PWR_DNģʽ����Ӳ����ʽ�����Dz��ı� program registers
{
	drv_ads8688_write_cmd_reg(PWR_DN);
}

void drv_enter_auto_rst_mode(void) // �����Զ�ɨ��ģʽ
{
	drv_ads8688_write_cmd_reg(AUTO_RST);
}

// ��ȡɨ��ͨ�����е�ADת������code������������
void drv_enter_auto_rst_mode_Data(uint16_t *outputdata, uint8_t chnum)
{
	uint8_t i = 0, datal = 0, datah = 0;
	uint16_t data = 0;
	for (i = 0; i < chnum; i++)
	{
		drv_set_ads8688_cs(kGpioStatus_Low);
		drv_ads8688_spi_send_rev(0x00);
		drv_ads8688_spi_send_rev(0x00);
		datah = drv_ads8688_spi_send_rev(0xFF);
		datal = drv_ads8688_spi_send_rev(0xFF);
		drv_set_ads8688_cs(kGpioStatus_High);

		data = datah << 8 | datal; // ��λ��ǰ����λ�ں�
		*(outputdata + i) = data;
	}
}

void drv_manual_chn_mode(uint16_t ch) // �ֶ�ģʽ
{
	drv_ads8688_write_cmd_reg(ch);
}

// ��ȡ�ֶ�ͨ����ADת������code
uint16_t drv_manual_chn_mode_Data(void)
{
	uint8_t datah = 0, datal = 0;
	drv_set_ads8688_cs(kGpioStatus_Low);
	drv_ads8688_spi_send_rev(0x00);
	drv_ads8688_spi_send_rev(0x00);
	datah = drv_ads8688_spi_send_rev(0xFF);
	datal = drv_ads8688_spi_send_rev(0xFF);
	drv_set_ads8688_cs(kGpioStatus_High);
	kit_time_dly_ms(10);
	return (datah << 8 | datal);
}

// Gary add function
uint16_t drv_get_ads8688_ch_data(uint16_t ch)
{
	drv_manual_chn_mode(ch);
	return drv_manual_chn_mode_Data();
}

// Program Register���
void drv_ads8688_write_reg(uint8_t Addr, uint8_t data)
{
	drv_set_ads8688_cs(kGpioStatus_Low);
	drv_ads8688_spi_send_rev(Addr << 1 | WRITE);
	drv_ads8688_spi_send_rev(data);
	drv_set_ads8688_cs(kGpioStatus_High);
}

// Program Register������
uint16_t drv_ads8688_read_reg(uint8_t Addr)
{
	uint8_t datah = 0, datal = 0;
	drv_set_ads8688_cs(kGpioStatus_Low);
	drv_ads8688_spi_send_rev(Addr << 1 | READ);
	datah = drv_ads8688_spi_send_rev(0xFF);
	datal = drv_ads8688_spi_send_rev(0xFF);
	drv_set_ads8688_cs(kGpioStatus_High);

	return datal + (datah << 8);
}

void drv_set_auto_scan_sequence(uint8_t seq) // �����Զ�ɨ������ͨ��
{
	drv_ads8688_write_reg(0x01, seq);
}

void drv_set_ch_pwrdn(uint8_t chn) // ����ͨ��nΪPower Down
{
	drv_ads8688_write_reg(0X02, chn);
}

void drv_set_ch_range(uint8_t ch, uint8_t range) // ���ø���ͨ���ķ�Χ
{
	drv_ads8688_write_reg(ch, range);
	kit_time_dly_ms(20);
}

int16_t drv_ads8688_value(uint16_t value)
{
	int32_t ret = 0;
	uint16_t tmp = 0;
	tmp = value & 0x7FFF;
	if (KIT_GET_BIT_VAL(value, 15) == 1)
	{
		return tmp;
	}
	else
	{
		return -tmp;
	}
}